Font Size: a A A

Research About Loop Stability Of LDO With Output Capacitor-Less

Posted on:2015-03-15Degree:MasterType:Thesis
Country:ChinaCandidate:Y TangFull Text:PDF
GTID:2252330428977247Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Benefit from the rapid development of the semiconductor industry, all kinds of electronic products have been integrated into people’s daily lives, especially notebook computers, tablet PCs, smart phones, MP3/MP4and other portable products have become an integral part of our lives. In the international situation about promoting low-carbon environment, the rational use of energy has become particularly important, in electronic products achieve this function is power management chip. The DC-DC switching power management chip due to the advantages of efficiency and low consumption, which is widely used in portable devices. Because of the needs of the market, the performance of DC-DC switching power management chip has been increasingly demanded.DC-DC power management chip also requires internal power supply, generally constitute a LDO (low dropout) linear regulator and a voltage reference, it is very important because it directly affects the performance of the reliability of the chip itself, and the dtability of the LDO loop is the most important in so many performance indicators. In this paper, starting with the theory and electrical performace of LDO, stressed the importance of LDO loop stability, and then analysis many loop compensation metholds which were widely used by the way of theroretical derivation. Meet the demand for the gain of LDO at low-frequency, a circuit was designed with open-loop gain compensation tracking load current. Consider the situation about the use of per-regulator for voltage reference circuit, which demanding needs of the process and having a negative impact on the minimum operating voltage of the system, a self-reference LDO was designed; The voltage reference circuit no longer need a seprate power supply because of the self-powered self-bias loop which was constituted by the voltage reference and LDO. The approach of desin can effectively reduce the area the internal power supply module, thereby reducing the area of the chip itself, and ultimately to reduce costs.Based on0.5μm BCD process, and in Hspice platform, simulation was verified for the two LDOs with output capacitor-less above. The results show that, the LDO with open-loop gain compensation methold, the loop gain at low-frequency was ranged form66.3dB to91.1dB befor compensated when the load current changed from10μA to10mA; After the compensation, the result was ranged from78.8dB to91.8dB, and the compensation circuit has no effect on the loop stability of LDO itself. The self-reference LDO can support the power supply environment from2V to18V, and the quiescent current was only48.93μA, the linear regulation and load regulation are57.27μV/V and28.9mV/mA, the gain of the self-powered self-bias loop was less than-85dB. Since the self-powered self-bias topology achieved the area reducing for the power supply circuit, and had no affect on the stability of the LDO loop, therefore, the circuit implementation was feasible.
Keywords/Search Tags:DC-DC power management, LDO, output capacitor-less, loop stability
PDF Full Text Request
Related items