| Today, we have entered the era of information technology, networking, digitization. Ourlives are filled with rich audio and video signals. The embedded design work as a major force.Advanced embedded technology promotes the vigorous development of the digital mediafield. The video and audio compressed with the MPEG-2standard is transport stream in thefield of digital television broadcasting. If transport stream is introduced into the IP network, itis TS Over IP technology which is popular in the field of digital television broadcasting today.Audio and video technology has been in rapid change since2008. The digital set-topboxes, Integrated Receiver Decoder(IRD) and other product has got a rare opportunity fordevelopment. Now achieving product’s network transmission of transport stream with ASIC,MCU and DSP, but they exist many shortcomings such as high cost, design complexity, poorportability and so on. This subject realizes transport stream transmission in LAN based onFPGA. This paper adds network transmission systems based on the hardware platform of thedigital satellite receiver. This system obtains the physical address of the other host byestablishing a network connection, and accesses to real-time network status information,selectively packs transport stream with UDP or RTP, makes transport stream unicast ormulticast through any way.The subject inplements hardware with the FPGA, chip AX88180in the MAC layer andchip88E1111in the PHY layer. Develop FPGA sub-modules to achieve the various functionsof the network transmission system by using Verilog HDL. Firstly, design the MAC and PHYlayer initialization module to complete RGMII module by configurating AX88180registers.Followed by the design of the data receiver module, can make decapsulation obtain sameparemeters through comparison the type of UDP, ARP, ICMP, and IGMP. And then design theintermediate data processing module, including the physical address conversion, checksumcalculations of ICMP and IGMP and the adjustment of the transport stream. Sending moduleare designed to make Ethernet frame encapsulation about ARP, ICMP, IGMP and UDP. At last,SignalTap II Logic Analyzerof the Quartus II9.1is used to crawl the real-time datas on theFPGA ports, checking the correctness of the sequence. Ethereal is a Network Packet SniffingTool which can monitor the real-time data during IRD and computer to prove its good LAN connectivity. At the same time, excellent communication capacity of the system can be furtherverified by the transmission rate and the packet loss rate on the web page of the IRD.The design has been adopted FPGA as the hardware platform, because it has thecharacteristics of high flexibility, portable, more importantly, its high level of systemintegration. Its advantages reduce the complexity of the wiring work and the PCB area,improving the stability. |
