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The Design And Realization Of Instruction Memory Management Unit In RISC Microprocessor

Posted on:2014-08-07Degree:MasterType:Thesis
Country:ChinaCandidate:K S ZhangFull Text:PDF
GTID:2268330425981748Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
IMMU (Instruction Memory Management Unit) is an important part in microprocessor. It can translate address from virtual address to physical address, allot the storage space in microprocessor and protect information, in order to guarantee the effective operation of operating system. With the development of Hadoop, high-throughput computing system has been get more and more attention. In this context, more technologies should be put forward so as to improve microprocessor speed,reduce the power and device size of IMMU.Therefore the design of IMMU in RISC architecture is studied in this dissertation. The work in this dissertation is as following:1. Analyse the theory of IMMU, storage management mechanism and TLB technology. Make the design project of IMMU. It includes ITLB and Hardware Translation Table Walk. With architecture like this, it can reduce the power and improve the speed;2. Design IMMU and implementate it. In ITLB design, the design of SRAM is improved, in order to improve read and write speed of ITLB. Hardware Translation Table Walk is design by hardware circuit,and it supports different granularity address access. The design of perfect internal control system can avoid the conflict problems in the operation of device. By the mean of improvement of round robin method, it can improve the coordination among devices in the microprocessor.3. Make simulation and verification on IMMU device. On the one hand, make functional simulation including register transfer level and netlist level through sysnopsys software, on the other hand, make FPGA prototype verification with Xilinx XC7K325T;4. Make performance evaluation of IMMU including power evaluation,sequential evaluation and area evaluation;In this design, for IMMU, the frequency of clock is able to reach800MHz in65nm proess library. Compared with other processors with same technological level, the percent of areas is0.75%and the percent of power is3.33%. The results is respectable, therefore, this topic will be a good guide for IMMU design.
Keywords/Search Tags:RISC, IMMU, Pipeline, ITLB, Hardware Translation Table Walk
PDF Full Text Request
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