Design And Implementation Of Godson-T Performance Counters

Godson-T is a technology developed for large scale in ultra deep submicron process on the implementation of the nuclear system calculation Chinese Academy of sciences. For many core architectures, on-chip computing and storage resources because of the variety and the amount is larger, resulting in the actual performance is restricted in many ways. Therefore, the analysis of more complex than the traditional single core or multi-core system performance on many core architecture. Aiming at this problem, this thesis analysis the performance study of Godson-T structure based on multi-core processor, specific researches are as follows:(1) the roofline performance analysis model is designed based on a performance counter. Can reflect the Godson-T multi-core structure accurately in computation, memory, communication and other aspects of the state through the counter. And the low10bits of information in value domain, can separate statistics including router, cache and other kinds of performance event purpose,(2) in Godson-T and the nuclear structure is implemented on the performance counters. By reusing existing circuit structure method, the only47%hardware overhead, the completion of the statistical three categories a total of57performance counts. Processor high-end users use these counters to analyze performance, hardware parameter information by running the program, performance testing, the proposed optimization scheme application.(3) for the FFT algorithm, was optimized with performance analysis system designed in this thesis, the optimization algorithm performance than the original algorithm is increased by more than3times, and put forward the need to modify the DTA data transmission mechanism for streaming on Godson-T.This thesis, through roofline performance analysis model and the performance counter in Godson-T, many core architecture, performance optimization of FFT algorithm is successful. This gives the follow-up on the many core architecture performance analysis, plays a guiding role. And for many core architecture of the chip design also has certain reference significance...