Digital Backend Research And Implementation Of Low Power Smart Meters MCU

With the rapid development of Chinese economy, the demand of power resources is growing increasingly at each aspect of the national economy, so the state is vigorously promoting the construction of smart grid. The smart grid system has a complex structure; it needs a large number of terminal devices and a series of important technology. The chip technology is one important component of the whole smart grid system. Smart meter is one of the basic equipment of smart grid. For a long time, the market of MCU (Micro Control Unit) chip is monopolized by foreign manufacturers. The micro control unit chip is the most important part of smart meter, a MCU chip with our own intellectual property rights is essential for the construction and development of the smart grid.Because of the special working environment of smart meter, the MCU must have high reliability, low power consumption especially static standby power consumption. Whether a chip has a good reliability and power quality is depend on the quality of IC backend design to a great extent.This thesis studies the whole backend flow and the method of the area and power optimization in the backend design flow of an integrated circuit chip. The target is optimized the whole design flow according to the characteristics of the smart meter MCU, considering the area and power consumption during the standard cell placement stage, clock tree synthesis and routing stage, find a better backend design method of the micro control unit chip after trying different solutions, so as to reduce the chip area, power consumption while ensuring the performance of chip.The main work completed was listed as follows:(1) Investigated the low power digital backend design method of the current international and domestic.(2) Made low power digital backend design flow, according to the characteristics of the smart meter MCU chip.(3) Completed the digital backend design, including Floor plan, Power plan, Placement, Clock tree synthesis, Route, RC extraction and Static Timing Analysis, optimized the flow of common digital backend design, reduced the chip area and power dissipation, obtained the design data that meet the standards of manufacture and pass the related verification.This thesis discusses the IC design industry in the digital backend design method and low power design, and completed a low power digital backend design that combined with the actual project to choose the low cost, obvious effect methodology, so as to balance the quality and cost, enhance the product competitiveness in the market.