The Design Of Clearance Intrusion Detection Hardware Platform For Railway Based On FPGA

With the rapid development of China’s railway construction, train speed continuously improves, which requires the safer operation of trains. However, railway clearance invasion accidents have occurred frequently, which cause huge casualties and economic losses. Although existing railway clearance intrusion detection methods can detect clearance, accidents would not be avoided because of poor real-time detection. Aiming at high real-time railway clearance intrusion detection, this thesis proposes a railway clearance intrusion detection hardware platform based on FPGA(Field Programmable Gate Array). By the use of FPGA technology and machine vision for real-time image processing and analysis, the hardware platform can realize the real-time detection of railway clearance.Firstly, the overall design of the railway clearance detection hardware platforms is introduced, including the overall structure of the railway network of clearance intrusion detection systems, the structure, the functions of each part and the overall algorithm. The image acquisition section, the image storage section, the image processing section and the image transfer section of the hardware platform and device selection are discussed. The overall algorithm is jointly completed by the FPGA and ARM. FPGA, responsible for image preprocessing, completes the initial alarm and feature extraction of clearance. While ARM, responsible for advanced image processing, completes the identification, classification, tracking and alarm of clearance.Secondly, the overall composition of the hardware circuit of the railway clearance detection hardware platform is introduced in detail and each constituent unit of the circuit design is described. On the basis of the design of the circuit, the thesis achieve image acquisition, image storage, image frame buffer control, the basic functions of communication between the master controller and the slave controller and the PC server.To accelerate the processing speed of clearance intrusion detection, the railway clearance intrusion detection algorithm is realized by the use of Verilog hardware description language. The background subtraction, background update, single scan connected component labeling and clearance feature extraction are implemented. Aiming at the requirement of identification, classification, tracking and alarm of clearance, single scan connected component labeling algorithm is proposed. Characteristic parameters of the clearance, including area, centroid, gray value and a circumscribed rectangle, are stored during the single scan. Parameters extracted will be transferred to ARM after the scan.Finally, in order to verify the effect of clearance intrusion detection for the hardware platform, experiments are conducted near the laboratory and along the railway line of Beijing North Railway Station. Experimental results show that parameters extraction is accurate and the processing speed is high enough for real-time detection, which is50%faster than software processing. Besides, the system detects at an average frequency of13f/s, which meets the requirements of real-time detection. For the invasion of railway clearance, the high-risk trend of clearance, trains and other noise, the hardware platform has a good discriminant effect and gets a detection alarm rate of88.57%for clearance intrusion detection.