Towards Complicated Mechatronic System Design In SysML:Model Verification For Conceptual Design Based On Extended Conceptual Graph

With the increasing complexity of the electromechanical products, the design process is becoming more and more challenging. In the context of problem solving for the system engineering, the model has been a displacement of the document as the carrier of information. The model verification is one of the most important steps during the process of design. It can help the designers to find design defects, reduce the costs of the development, improve the reliability of the system and improve the developing efficiency. The verification process is carried through with the design process nowadays. Compared to the approach "verification after design" which ignores the verification in the early stage of the design, "verification with design" is more likely to find faults as early as possible.The design of the electromechanical products can be divided into four stages: requirement analysis, conceptual design, embodiment design and detail design. As one of the most vital steps of the whole design process, the conceptual design determines the main architecture. Beginning from the user requirement, the conceptual design goes through function decomposition, principle solution searching, scheme design, and finally gets the model for conceptual design, which is a process full of creativity. The correctness of conceptual design is of vital importance. Recently, more and more attention is paid to the model verification and a lot of new standards and methodologies are proposed towards the verification in different domain. However, the existing work cannot fully support the formal verification for the conceptual design model in system engineering. We propose an approach for the formal verification for the conceptual design model, based on SysML and the extended conceptual graph. The main work is as follows:1. We present a definition for extended conceptual graph based on SysML after analyzing the conceptual graph in the standard of ISO/IEC 24707. The Common Logic, defined in ISO/IEC 24707, is a logic frame for information exchange. Conceptual graph is one of the three dialects promoted by Common Logic, which in the other hand, has a lot of extensions. In order to support the verification of conceptual design in SysML, an extension of conceptual graph and the corresponding projection are presented.2. A formal representation for static property in requirement is given, named as relation oriented static property modeling language (ROSP). Since requirement is semi-structured, in order to process it, the requirement needs to be decomposed into properties. A lot of languages support the representation of properties such as LTL, CTL, and PSL. But for the modeling of static properties, they are too heavy and complicated and require professional skills and experience. A lightweight representation is presented aiming at the static properties in requirements.3. The verification approach based on extended conceptual graph is presented and implemented in this article. The static properties in the original requirement are written as ROSP, which is transformed into extended conceptual graph in the following steps. The conceptual design model is also transformed into extended conceptual graph. By the projection operation between the two conceptual graphs, the conceptual design model can be verified.