Design Of DC-DC Converter With Pseudo-type Ⅲ Compensation

With the rapid development of notebook computers, mobile phones, MP3 players and other portable devices, DC-DC converters are more wildly used. The current trend of DC-DC converter is smaller size and better performance. The current methods of reducing the size of the DC-DC converts include: reducing the feature size of CMOS standard process, the size and number of passive components used. The state of the art of the CMOS standard process feature size is declining to the nano-scale level; reducing the size and number of passive devices needs the on-chip compensation technique evolving. In order to supply power to different modules, integrated multi-channel DC-DC converter on PMU(Power Management Unit) chip has been rapid developed. A PMU chip integrates multi-channel power converter(including the DC-DC converter and LDO(Low Drop Regulator)) on a single chip, which not only supplies power for multiple devices at the same time, but also saves the chip size..This paper presents a DC-DC converter with pseudo type-III compensation in PMU. To get a low-frequency zero, the traditional way of type-III compensation using op amps and resistor-capacitor network often needs a lot of resistance and capacitance,which can’t be integrated on-chip. The DC-DC converter designed in paper with pseudo type-III compensation can achieve type-III compensation effect with small capacitance and resistance to get higher integration. The DC-DC converter uses a fully differential circuit structure to effectively suppress influence of common mode and noise from ground; reduces output voltage steady-state error of the DC-DC converter and improves the regulation and dynamic speed regulator of the system; and adopts the PWM(Pulse Width Modulation) and PSM(Pulse Switch Modulation) dual-mode conversion, and the dead-time control technology, dynamic self-shutdown control and adaptive power management resizing technology in different modes can improve the DC-DC converter’s efficiency at different loads.The DC-DC converter chip with Pseudo-type III compensation designed in this paper uses the 0.13μm standard CMOS process. Simulation results show that the DC-DC converter meets all the requirements: Input voltage is 2.6-4.2V, switching frequency is 2MHz; Output voltage ranges from 0.7 ~ 1.5V continuously, by 25 m V step;adjustment rate less than 1%, the maximum load current reaches 1A, its efficiency is more than 90%.