Design And Implementation On If And Baseband Signal Processing Module Of Dual-channel Digitizer

Digitizer is an important bridge between analog and digital signals, and also has digital signal processing capabilities. Digitizer with dual-channel high-speed signal acquisition and processing functions, receiver module and industrial computer module together can complete an oscilloscope, spectrum analyzer, wireless communications analyzer and radio direction finder system. High-speed dual-channel digitizer can simultaneously target both analog signals, that is, the real-time spectrum analyzer can perform real-time analysis of any two frequency points within the frequency range. It can also complete simultaneous acquisition of I/Q two channnel for baseband I/Q modulation analysis; In radio direction finding system it can capture the reference channel and the other receive channel at the same time to achieve finding and positioning functions.This paper based on PXI bus-based dual-channel digitizer engineering application background proposes design solutions to PXI bus-based, dual-channel digitizer and focuses on the the key technology and its achievement on IF and baseband signal processing module of dual-channel digitizer. Data width between the ADC and the FPGA and clock frequency are high(DDR transfer mode), in order to ensure that after each layout reading error which is caused by the relative delay between data and clock(DCO) within FPGA does not occur, this paper designs and implements a DLL circuit that can complete automatically synchronizing the data and clock and improve the efficiency of development. Multi-gear digital down-conversion unit presents an efficient set of fractional decimation filter architecture(CIC decimation + CIC compensation + CIC interpolation). The core of the fractional decimation filter circuits consist of efficient structures which makes dual-channel digitizer RTBW(real-time resolution bandwidth) reached 42 while saving resources and meet the needs of more flexible analysis. Against the problem, that is, in order to save or use the on-chip resources efficiently reducing treatment-bit-wide causes loss of dynamic rang, this paper presents a high-efficient dynamic range compensation gain control circuit structure, which avoids the division operation, not only reduces bit wide and consumption of resources but also ensure the dynamic range. In order to meet user demand for I/Q baseband signal modulation analysis, the paper which take advantage ofthe fact that dual-channel digitizer can complete parallel acquisition of dual signal,presents a high dynamic hardware processing architecture that is capable of modulation analysis of QPSK and 4~256QAM baseband signal at any rate within the range of0~51.2Msps.The designed each functional unit of dual-channel digitizer baseband signal processing modules in article is working properly and meet the engineering application requirements. After extensive testing and validation, performance is stable. The digitizer can be applied to common communications test system or equipment.