Design Of Five-order High Stable Digital Interface For Mems Accelerometer With High Q

High r esolution a ccelerometers w ith mic ro-g n oise h ave ex tensive ap plications including in ertial n avigation, mic ro-gravity measurements i n s pace, pl atform stabilization, earthquake detection, et c. Capacitive acc elerometer is v ery attractive in high resolution design due to its high sensitivity, low temperature sensitivity, low power consumption, and simple s tructure. In r espect o f i nterface o f a ccelerometer, micro-mechanical ΣΔ interface draw a lot of attention since it is simple structure with digital output and it is less affected by accuracy of analogue circuits.A five-order stable digital accelerometer interface for high-Q sensor is designed and the equivalent noise of accelerometer is close to 0.4μg /√Hz. High-Q structure leads to damper sensor and delay the responds to input signal. Besides, according to the papers, stability o f ΣΔ circuit i s g oing dow n w ith t he or der of l oop increasing. Therefore, stability design of interface circuit is the hard part of this paper. To solve the problem, two considerations are taken. One is to add phase compensation to the loop. The other is that system topology adopts distribution feedback pattern and stable loop parameter is got by scanning.On t he ba se of t heory analysis of pr inciple o f capacitive acc elerometer an d ΣΔ modulator, a five-order micro-mechanical ΣΔ interface circuit with of the quality factor of 38.9 is designed. The behavior simulation is done in Simulink and the result of it is that SNDR is 119.1dB and ENOB is 19.49 bits and noise floor is close to-140 dB.Based on the behavior design, transistors level of interface is completed with 0.5μm CMOS technique which contains front-end charge sense amplifier, phase compensation, integrator, qua ntization, t ime control circuit a nd s witch m odule, e tc. After FFT of interface out put, noi se floor of i nterface c ircuit i s a bout-140 dB and ha rmonic i s-124.6dB and SNDR is 105.8dB and ENOB is 17 bits. And the result of layout is that harmonic is-117.1dB and SNDR is 101.4dB and ENOB is 17 bits.