Design And Implementation Of Parallel Structure Of High-Speed Filter In Space Camera

Space camera is an important part of the platform for space environment monitoring, device monitoring and scientific experiments. With the rapid development of space technology and the increasing demands on visualization of space exploration, space cameras have been widely used in aerospace aircrafts in recent years. The camera can help the spacecraft and space station docking accurately, monitoring various spacecraft operations. The working environment of space camera is characterized by micro-gravity, extreme temperature, intense radiation, and low-light shooting. Image processing applied to space camera is facing serious challenges.The topic of this thesis comes from the needs of high-speed image processing of aerospace high-definition camera. Photos of high-definition cameras in the spacecraft for scientific experiments and equipment monitoring are usually taken in low light so that a lot of noise is inevitably introduced in the process of image acquisition and transmission. The noise not only affects the subjective quality of the images, but also seriously affects the performance of video coding system. High-speed image filtering which can remove image noise and effectively protect the image detail texture information simultaneously, is an essential part of aerospace video compression system.The author’s major contribution focuses on de-noising problems of high-definition video of space camera which can be outlined as follows:1. Image filtering algorithms are categorized and analyzed. Thorough analysis of the advantages and disadvantages of various filtering algorithms are made, as well as problems in parallel implementation on hardware. After comprehensive comparison and analysis, the filtering algorithm which meets the processing speed and resource utilization requirements at the same time is selected to achieve real-time filtering of high-definition video of space camera.2. FPGA is not suitable to compute the floating-point calculation of complexity weights. DSP is used to calculated spatial distance weights with fixed parameters. These weights are transmitted to FPGA by EMIF port after being integerized and normalized. When calculating the similarity weights, five parameters are selected after making an analysis of the domain of the common noise. Similar weights of each pixel are calculated and written into five different ROMs. They are obtained by looking up the ROM tables whose selection is controlled by the EMIF port of DSP.The hardware architecture of bilateral filtering is designed using powerful parallel computation of FPGA. The pipeline operation to each pixel can achive high-speed filtering that all calculations of one pixel is done per clock on average. State machine is designed for cycling caching and reading of pixels in the architectural design of the hardware. The parameters of the filter are passed by EMIF port. The verification of the design is completed both on software simulation and hardware implementation. The result of practical application shows that the design of bilateral filtering can achieve real-time filtering of high-definition video of space camera with a small amount of resources.3. Photos of space cameras taken in low-light were dealt with filtering in the hardware. The filtering effects were evaluated from subjective quality evaluation and objective quality evaluation, and the results show that the hardware-based bilateral filtering achieves good filtering performance.