Research On Testability Verification And Integrated Evaluation Technology Of Electronic System

Testability verification is an important part of the equipment to decide whether the design for test is acceptable or not. At present, the main verification method is physical verification, whose characteristics are as follows: high test cost, long time cost, high difficulty to inject faults and so on. Thus, it is necessary to find a new method about virtual testability verification to solve these problems. Firstly, the paper optimize virtual verification scheme, then we conducted virtual fault injection with the fault injection system and evaluate testability index based on experiment result, finally virtual testability verification software is developed. The main research contents of the thesis are listed as follows:1. Firstly, a deep research is made on the issue that the design of virtual verification scheme is not clear at present. The virtual verification scheme mainly includes the test plan designing and the selection of fault sample size. In this paper, an optimization method based on binomial distribution is proposed on the basis of previous scheme design mainly using probability theory. And through the computer programming, some of the commonly used scheme designs are found and listed in the table for query. There is a greatly requirement for large sample sizes for the design scheme on the basis of probability theory. In order to reduce the test sample size, this paper proposes a method to by fusing the information from the development phase. Compared with the previous methods, this optimized method can significantly reduce the amount of fault samples, which makes it greatly suitable for verifying the program of expensive equipment. The research on sample size selection in this paper mainly includes stratified distribution of sample size based on mean time to failure and using fault propagation probability model to optimal select failure mode in the sub module. In this paper, the research of virtual verification scheme can sufficiently address the issue that the virtual verification scheme is difficult to be determined.2. For the problem that the model is difficult to establish and high risk of fault injection in the virtual verification, this paper researches a technology of correlation virtual modeling, thereby developing the fault automatic injection system. The correlation virtual modeling is simulated based on the test samples, during which the circuit-under-test is a self-excited oscillation. The frequency-phase difference characteristic curve of the circuit-under-test in testability design is obtained according to the faults injected by system, which could work out the virtual model. Fault injection system is realized by using VS and Pspice mixed programming.3. In the process of virtual validation, there are problems that difficult to assess indicators and low confidence. This paper evaluates the testability metrics by adopting probability theory and increases the confidence by the method of testability physical verification with small testability objects fused. The estimation method mainly contained the point estimation method and the interval estimation method. Bayesian formula is used in the comprehensive evaluation method. Meanwhile, a method of fault assessment using virtual model is put forward. In this paper, the virtual model is transformed into a multi signal model, then the system faults is diagnosed by the method of fault diagnosis based on multi signal model.4. A testability software platform for virtual validation and analysis is designed in the paper. The software development environment is VS, on which the hybrid programming of Pspice and SQL Server is operated. Five functional modules are implemented in the software that are virtual verification scheme design module, automatic fault injection module, virtual modeling module, parameter evaluation and fault diagnosis module.