Implementation Of MPEG-2Transport Stream Multiplexer Based On FPGA

As the countries of the world rolled out plans to switch off analog TVsignals, China has also accelerated the march to the pace of digital TV, fromlast year to now, the State and the Radio and Television Council have issued aseries of policies, providing a strong support for the promotion of digitaltelevision. In this context, the flourishing development of digital TV industrydrives research and development of a series of related products. In which,multiplexer, as an integral part of DTV head-end, become the object of studyof this topic.This paper first introduces some relevant protocols of MPEG-2and DVBstandard which multiplexer followed, and then analyzes the working principleand the main function of multiplexer, allocates logic functions to be achivedfor hardware and software according to their superiority, and on this basis,proposes an implementation program of multiplexer, finally, gives the entiredesign a system-level test with satisfactory results.The innovations of this paper are:(1) This paper, aimed at low-cost FPGA chip characteristics and situation oflimited resources, puts forward a reasonable function division of thebackground management software and hardware FPGA, makes the completeimplementation of the multiplexer function on a low-capacity FPGA chip,using innovative design methods.(2) This paper has developed hardware and software communicationprotocol, which has excellent compatibility, so that it would only change asmall part of the FPGA design and the protocol without any impact on theoriginal design performance when new functions are added to the multiplexer.(3) This paper explores a "sliding priority" design method on FPGAimplementations of the output scheduling algorithm to improve the schedulingefficiency and to extend the value of the maximum output rate.