| With Radio Frequency Identification is a technology of contactless automatic identification. RFID tags have a broad application prospects in the intelligent identification and automatic management in the future. Comparing with the traditional bar codes identification technology, magnetic cards and IC cards, RFID tags have many features such as non-contact, strong anti-interference ability, intelligence, long life, fast reading and writing speed, long identification range and identification multiple items in the same time. At present, RFID has become one of the most widely automatic identification technology in the application field. It is mainly used in transportation, logistics management, gate-prohibition system and many other automatic management systems.This paper mainly designs the analog front end(AFE) circuits of the 13.56 MHz RFID tag chip based on ISO/IEC15693 standard. The main content includes introduction to the international standard ISO/IEC15693 protocol, the theory of RFID technology and working principle, composing of tag’s AFE circuits and detailed description the principle and working process of critical circuits. The main circuits include the rectifier and filter circuit, the limiting voltage circuit, the power generation circuit, the ASK demodulation circuit, the resistive load modulation circuit, the clock recovery circuit, reset signal generation circuit and charge pump circuit. This paper optimizes and improves the rectifier circuit to reduce the chip’s area, and achieves a simple structure and low power the circuit of power generation, its current is less than 18μA.In addition, using active resistance replaces passive resistance in envelope circuit to optimize area of demodulation circuit. And designs 10%ASK demodulation circuit and 100%ASK demodulator circuit to reduce power consumption. And then this paper design a high reliability load modulation circuit. This tag meets the ISO/IEC15693 standard and achieves low power consumption.The AFE circuits of RFID tag has been implemented with GSMC 0.18μm process and using the spectre tool to design circuit and simulation. The layout is completed by virtuoso. And then given DRC checking, LVS checking and extracting parasitic parameters of the layout by calibre tool. Giving the simulation to the entire AFE circuits, it shows AFE circuits working well and meeting requirement. Then using Cadence exports the layout file that is submitted manufacturer to process and manufacture. Finally, determining the test scheme of AFE circuits chip and completing test and verification. The results is almost the same with simulation results, it shows the design achieved the intended targets and functions. |