Design And Implementation Of A Low-frequency RFID Tag Based On FSK

Low-frequency Radio Frequency Identification(RFID)tags are wireless identification and item tracking technologies that operate in the frequency range of 125k Hz.It is commonly used for pet identification,logistics management,access control,and other similar scenarios.With the development of big data and the Internet of Things,the market size of low-frequency RFID tags has been increasing year by year,and new requirements have been proposed for the read-write distance,manufacturing costs and function of tags.To address this,this paper adopts a combination of theoretical analysis and experimental research methods to design and implement a low-frequency RFID tag chip based on frequency shift keying(FSK)modulation,which is mainly divided into analog front-end circuit,digital control circuit,and Electrically Erasable Programmable read only memory(EEPROM).For the chip analog front-end circuit and digital control circuit has been improved to adapt to more complex application scenarios.The specific optimizations and implementations are as follows:(1)To improve the anti-interference performance and read/write distance of the tags,a data communication method is used that receives Amplitude Shift Keying(ASK)signals and sends Frequency Shift Keying(FSK)modulated signals.In addition,a method is designed to adjust the FSK frequency by writing data to adapt to frequency changes in different environments,thereby achieving precise and controllable FSK frequency for the tag.(2)A rectifier circuit that can stabilize the rectifier voltage at 6.5V within 6ms is designed,an overvoltage protection circuit is added,and the quiescent current loop is automatically cut off during data transmission,which solves the problem of additional energy loss of the rectifier circuit and ensures the stability of the chip working voltage.The single-tube amplifier is used instead of the operational amplifier in the series regulator circuit,which optimizes the overall circuit scale of the power management module without affecting the circuit function,and reduces the cost of chip tape-out.(3)The digital control circuit uses the popular Verilog system modeling-gate-level circuit synthesis-automatic layout wiring physical implementation design process.To ensure the security and integrity of tag data,the data block lock function is designed in the communication protocol design,which can effectively prevent the data of the tag chip from being tampered with.At the same time,the Cyclic Redundancy Check(CRC)module is designed,which reduces the error rate of data transmission.In this paper,the overall layout design of the tag chip is completed in the 0.35μm EEPROM process.and the overall layout area was 1.26mm~2.The chip was tested after being manufactured.The experimental results show that the tag can achieve the data read,write and lock functions.The chip yield rate was 91.0%,with a high read-write success rate and stability.The longest read-write distance was 15cm.It can meet the needs of some complex application scenarios and has practical value.