Design Of High Speed CCD Control Unit And Research Of Video Processing

High frame rate, high resolution video has been widely used in various machine vision fields. Militarily, reconnaissance equipment like infrared detector, electro-optical camera and so on, must overcome the factors such as high speed and bad weather to obtain high frame rate,high resolution video, In public traffic safety, monitoring aircraft flight attitude, and tracking the train running in high speed, also need high frame rate, high resolution video to meet the high speed transient movement scene; In daily life, with the emergence of all kinds of digital video products, people’s demand for high resolution, high quality video is becoming more and more big; But with the limits of many factors like IC technology level, data processing and transmission technology, it’s difficult to achieve high level for image frame rate and resolution at the same time, as a result, high frame rate, high resolution video acquisition has been a research hotspot in video processing field.With the research subject of high frame rate, high resolution video acquisition, designing a high frame rate, high resolution video acquisition system, this paper proposes a novel image super-resolution algorithm. Specific research contents include the following three aspects: firstly, the paper designs a high frame rate, high resolution video acquisition system with CCD branch of high frame rate video and CMOS branch of high resolution video, to implement high-speed CCD control unit module design and AD9928 analog to digital conversion module design in CCD branch; Secondly, this paper proposes an adaptive NLM based image super-resolution algorithm, a feature of it is the pixel blocks with different characteristics are allocated smoothing factor adaptively, reserving more original information of the image, another feature is by using double reference frames to super-resolve, adding more high frequency information, to improve the quality of image; Finally, modifying the proposed image super-resolution algorithm to the one suitable for hardware, using the parallel characteristic of FPGA, blocking every image, to implement hardware simulation of image super-resolution algorithm.Collecting a lot of standard high resolution image sequences to conduct experiments, comparing varieties of classic super-resolution algorithms, the experimental results show that the proposed image super-resolution algorithm has higher performance on both the subjective evaluation and the objective evaluation, at the same time, the result images of the hardware implementation of image super-resolution algorithm have the same quality with what are generated by the software implementation, having high PSNR and SSIM.