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Analysis And Verification Of Floating-Point Unit For X Microprocessor Based On The PowerPC Architecture

Posted on:2016-10-09Degree:MasterType:Thesis
Country:ChinaCandidate:J YangFull Text:PDF
GTID:2308330503476345Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
The microprocessor is closely related to people’s lives, the floating point unit (FPU) is one of the core arithmetic units of microprocessor and is an important measure of the microprocessor performance indicators. This thesis is to study FPU of the X microprocessor based on PowerPC architecture in the project of Shenzhen State Microelectronics Limited, which has very important significance in military strategy. The verification work has very important position in the process of chip development, which every step forward of the design work almost need it.First of all, this thesis outlines the basic concept of verification, and then introduces the method and technology of verification. According to the requirement of the project to efficiency of verification, it applies the verification strategy of system level simulation. Then it analyzes the data path of floating point unit that include the partial product generation, partial product compression, addition, leading zero anticipator, normalization and rounding of data and other modules. To extract test functions based on the functional characteristics of floating point unit, this thesis build a system verification platform that have strong reusability and high efficiency. The data reading module of system level verification platform designed in this thesis can be used to read floating point data files under the specified path, It greatly reduced the test stimulus of code is used to generate the floating point data, and improve the verification efficiency to FPU. Through the part of the signals changes in platform, the platform can be used to verify other functional units in X microprocessor and shorten the verification cycle. By adopting the special floating point data and general floating point data for testcases, the platform can be used to verify floating point addition, subtraction, multiply-add and so on in full functional simulation verification and post simulation verification to FPU. Through the analysis of two kinds of simulation results, the floating-point unit passed the verification.The simulation verification strategy and system level verification platform in this thesis can be used in the related engineering projects, and also could improve the verification efficiency and shorten the chip development cycle.
Keywords/Search Tags:Functional simulation verification, X microprocessor, FPU, floating MAF, system level verification platform
PDF Full Text Request
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