Test Process Capacity Improvement With Continuous Testing At S Company

Capacity improvement without investment has been always the game for manufacturing company to compete with each other, the same thing happen at Semiconductor industry which involves heavy equipment investment. Memory test is a small branch of testing. Compare with other semiconductor devices, memory test time is much longer and has much more sites tested in parallel.Base on the data of flash test capacity loss, this paper utilize OEE (Overall equipment efficiency) tool and Lot size theory to do capacity improvement. First, start with OEE report and utilize Pareto chart to outline the three major losses:Partial touch down loss, lot load/unload loss and retest loss; Second, based on the above issues, propose the continuous testing method to solve the issue, and provide detail explanation of how to realize the new process; Last, use actual data to evaluate the proposed solution and provide conclusion and suggestion for further study.