Development Of MAPS Readout Electronics

Beijing Spectrometer III is a modified large-scale detector on Beijing electron-positron collider(BEPCII).Due to its aging condition of the internal track part is getting more and more serious currently,the experiment needs to pre-research the next generation of the track chamber of the technical program.Therefore,Experimental Physics Center of Institute of High Energy Physics(IHEP)and a team from Shandong University applied for the Big Science Device Joint Fund of Natural Science Foundation of China(NSFC),and got the approval to carry out the “The MAPS Technology Study for the Inner Chamber Upgrade of BESIII MDC”.The research of the electronic system is one of the important parts of the whole project.According to requirements of MAPS(Monolithic Active Pixel Sensor(MAPS)project,the electronics system needs to develop a 1/10 inner chamber model.Considering the characteristics of the detector's signals and the need for data transmission,it is necessary to design a data readout and processing circuit as well as the relevant FPGA firmware program to achieve its function.The electronics system includes two levels of circuit.The first level is the Ladder,this circuit will make 10 detectors as a unit module,wire bonding in a flexible cable and transfer the signal to the back-end circuit.The second level is front-end control board.This circuit is a major part of data processing,need to realize the communicate among DAQ,detector and electronics,including load the configuration information,controlling the whole system as well as the data transmission and processing of the ladder.At the same time the power circuit supply and monitor the power to all modules according to its characteristics.The main function of the program is controlling the electronic system and data transmission.Including the JTAG(Joint Test Action Group)protocol,data processing and TCP / IP network communication protocol.Taking the rich logic resources into account,the data processing and communication protocols was designed flexibly.Each level of the program is set up a cache mechanism to process the data,ensuring its stability.According to the function of the design,a simulation of program and computer was applied to verify its function.The data was accessed under test environment when associated with the DAQ group and detector group.Thus analyze the overall function of the system.