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Multi-channel Waveform Digitization System Utilizing Switched Capacitor Array ASIC

Posted on:2018-08-03Degree:MasterType:Thesis
Country:ChinaCandidate:Y M LuFull Text:PDF
GTID:2310330515496557Subject:Physical Electronics
Abstract/Summary:PDF Full Text Request
In the nuclear and particle physics experiments,most comprehensive information of the detector output signal can be obtained by full waveform digitization based on high speed sampling techniques.Thus waveform digitalization technique has become a research hotspot in electronics design for physics experiments.However,there exist tremendous numbers of channels in large scale experiments,which excludes the use of traditional waveform digitization method based on high speed Analog-to-Digital Converters(ADCs)because of high complexity,high power consumption and costs.Meanwhile,in the structure of SCAs(Switched Capacitor Arrays),high speed sampling circuits are combined with comparatively lower speed quantization circuits,which makes it possible to achieve high even ultrahigh speed waveform digitization with much lower power consumption and system complexity.Therefore,much attention and efforts have been devoted to the research in this domain,and SCA ASICs are being researched in multiple institutes abroad,and several SCA chips have been used in physics experiments,such as in ANTARES(Astronomy with a Neutrino Telescope and Abyss environmental Research)and H.E.S.S-II(High Energy Stereoscopic System-?),etc.Institutes and universities in China also began the research both in SCA based waveform digitization methods and ASICs.The work in this paper focuses on the design of multiple channel waveform digitization electronics utilizing a SCA ASIC which has been designed and fabricated in our laboratory.A total of eight channels are integrated in the waveform digitization module with a sampling rate up to 2 Gsps.Configuration and readout control,as well as data interfacing logic are integrated in one FPGA(Field Programmable Gate Array)device.External SDRAM and USB interface are also implemented in this module.Tests were conducted to evaluate the system performance.This dissertation is organized as follows:Chapter One presents the waveform digitalization technique in physics experiments,and reviews several experiments employing this technique,including utilizing high speed ADCs and SCA ASICs.In Chapter Two,methods to implement waveform digitization are reviewed,especially the key parts for high speed sampling,which can be categorized into two types:one is high speed ADC and time interleaved A/D conversion,and the other is SCA.Chapter Three includes detailed information about the design of this multiple channel waveform digitization module.After a brief introduction of the SCA ASIC employed in this paper,the architecture of this waveform digitization module is presented,as well as the hardware design of the main circuits and FPGA logic.In Chapter Four,the test results of this waveform digitalization module are presented,including quiescent performance tests,transient waveform tests and bandwidth tests,etc.The results indicate that a 2 Gsps sampling rate is successfully achieved,and this module covers a input amplitude range of 100 mV to 1 V with an INL better than 1%and a RMS noise of around 1.92 mV,while the-3dB input bandwidth is up to 430 MHz.Chapter Five concludes this dissertation and presents the plan of future work.
Keywords/Search Tags:Switched Capacitor Array, waveform digitalization, high speed sampling, FPGA
PDF Full Text Request
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