Design Of DC-DC Buck Converters Based On The Single-Input Fuzzy PID Control Algorithm

The dynamic performance of DC-DC buck converters is crucial for stable operation of electronic devices. Traditionally, the linear controllers based on the local-linearization small-signal model are designed for one nominal operating point in many power converter applications. Unfortunately, the DC-DC buck converters exhibit nonlinear nature and load dependent poles, which is a challenging task to be coped with using conventional linear control strategies.This paper proposes a single-input fuzzy PID (SIF-PID) control scheme for DC-DC buck converters to obtain superior dynamic performance and small hardware resource occupancy. Firstly, the main topology of the DC-DC Buck converter and functional modules of the control loop are studied. Furthermore, the open-loop transfer function of the uncompensated system is established. Then the PID parameters are tuned using frequency-domain method. In addition, membership functions of the fuzzy logic input and output variables are designed. Subsequently, the establishment of Toeplitz type fuzzy rule tables with fast response and low overshoot properties is accomplished by analyzing the system response curve and its mapping in the rule table, achieving a double-input fuzzy PID (DIF-PID) controller. Finally, the signed-distance method is utilized to reduce the dimension of the DIF-PID controller to decrease the hardware resource occupancy, obtaining the SIF-PID controller. Meanwhile, the parameter is optimized using genetic algorithm to guarantee the equivalence of SIF-PID and DIF-PID controllers in terms of control performance.The FPGA based verification platform of the digitally controlled DC-DC Buck converter is built and tested under different conditions. The setting time of SIF-PID and DIF-PID based DC-DC Buck converters are 182?s and 178?s respectively while the setting time of the PID controlled converter is 252?s in startup process. The SIF-PID and DIF-PID based DC-DC Buck converters have approximately equal recovery time and overshoot when the load current step changes between 0.8A and 1.OA, which is superior to the PID controlled converter. The output voltage variation is within 1% and ripple voltage is 26mV when the input voltage changes from 2.0V to 5.0V or the load current changes from OA to 1.2A for the SIF-PID controlled DC-DC Buck converter, which meets the design specifications and steady performance requirements.