Modeling And Analysis Of Nonlinear Characteristics Of A Digitally Controlled Voltage-mode DC-DC Converter

Digital control of switching-mode power converters has gradually become an irresistible trend for the following advantages:excellent flexibility,programmability,and is easy to implement various kinds of advanced control algorithms.However,on one hand,the delay of digital control may degrade the stability of the system.On the other hand,the quantization effects of the ADC and the DPWM in a digitally controlled power converter system may result in limit cycle oscillations in some situations.As a consequence,the influence of delay and quantization should be taken into consideration when designing the digital controller in order to guarantee the stability of the system.This thesis uses a digitally controlled DC-DC Buck converter as the research object.Firstly,considering the sample-and-hold module,the time delay of the analog-to-digital conversion together with the control algorithm calculation,the closed-loop system model is established and the method to calculate the parameter range that could guarantee the stability of the system based on the Jury test is presented.However,owing to the quantization effects of digital control,limit cycle oscillations may still occur within the stable range discussed above.After that,the describing function method is applied here to obtain the amplitude and offset-dependent gain model of the ADC and the DPWM on account of the limit cycle oscillations studied in this thesis is quasi-sinusoidal.Then,under the premise that the resolution of the DPWM is sufficiently high that satisfies the static and dynamic conditions to eliminate limit cycle oscillations on two duty cycle levels,considering both the ADC and the DPWM in the control loop have maximum equivalent gain,the complete closed-loop system model includes the delay and the quantization effects is presented.Combining the constraint on the upper limit of the integral compensation gain to guarantee a static no-limit-cycle condition,the parameter range of the compensator to ensure a stable system in this situation can be calculated accordingly.Finally,corresponding simulations in Simulink and circuit tests based on FPGA are carried out.It is proved that the low-frequency oscillations of the output voltage are resulted from the Neimark-Sacker bifurcation,and since the amplitude of the low-frequency oscillations is large,the influence of the dynamic gains resulted from quantizations on the bifurcation of the system can be ignored.Secondly,low-resolution DPWM may lead to a large equivalent dynamic gain,and the limit cycle oscillations on two duty cycle levels will occur when the phase lag reaches 180 degrees and the loop gain magnitude equals to unity.Thirdly,it can be noted that the limit cycle oscillations may have already happened before the occurrence of the low-frequency oscillations due to the quantization effects of the ADC and the DPWM.As a consequence,a high-resolution DPWM is necessary to avoid the limit cycle oscillations.Besides,the influence of delay and quantization on the stability of a closed-loop system should be taken into consideration when determining the compensator parameters.