Research And Design Of Multi-user Intelligent Electric Energy Meter

With the rapid development of urban residential building’s intelligent and centralized in China,the traditional "single family single table" electric energy meter ’s high power consumption,large manual consumption of information collection and other defects like management cumbersome are gradually revealed,which contrary to the social pursuit of power management intelligent,collection automation,intelligent energy save.At the same time,with the development of embedded technology,FPGA technology and related technology,making a multi-user power meter model which measure the consumption of electricity users with single processor by timesharing shunt,and centralize processing and transmission gradually recognized and accepted.Intelligent multi-user power meter not only facilitates the management of the power management department,but also makes the development of the smart grid process more stable,flexible and diversified.This paper designs an intelligent multi-user meter system that builds a programmable on-chip system(SOPC)by calling a soft-core processor,Nios II,in a field-programmable gate array(FPGA),supplemented by peripheral circuits for multiple user power parameters’(Grid voltage,current,power,harmonics,etc.)real-time measurement and remote transmission.Firstly,the research background,significance and development status of intelligent multi-user electric energy meter are expounded.Then,the basic calculation of power parameters is analyzed,and the harmonic measurement is implemented using Fast Fourier Transform.On the basis,the principle of time-division multiplexing is used to achieve multi-user energy metering.After then,the research and design was introduced in detail from the aspect of hardware and software of the system.Among them,the hardware part uses FPGA as the core controller,and the Nios II soft core CPU is embedded as the system data operation and processing center,and is connected with peripheral modules such as energy metering module,display module,storage module,and communication module,etc.to complete the electricity measurement of 32 households.The software part of the Nios II CPU as the core,build Nios II system,the A / D sampling control module,SDRAM memory,FIFO module,FFT modules and other peripheral modules hung on the Avalon bus,and then The Nios II CPU is integrated on a single FPGA for functional control.In this system design process,using the design concept of the programmable on-chip system SOPC,the program is written through the Verilog HDL hardware description language.Finally,through the test of the experimental results and the error analysis,the feasibility of this design scheme is verified,which indicates that the multifunctional energy meter designed in this paper has the expected effect and has great application value.