Design Of Arbitrary Waveform Generator With High Rate And Deep Capacity

Arbitrary waveform generator(AWG),which can simulate complex waveform signals,is a signal resource.With the characteristics of flexible signal generation,high frequency resolution and stable output frequency,AWG plays an important role in communications,radar or biological systems.The sampling rate and storage depth that determine the bandwidth and waveform complexity of the output waveform,are two key specifications of the AWG.To achieve the sampling rate of 4GSPS and the storage depth of 2G points per channel,this paper proposes a design of dual-channel arbitrary waveform synthesis module.The main research is as follows:1.Whole design.To achieve the storage depth of 2G waveform sampling points,the SDRAM is chosen as the look-up table by comparing the pros and cons of SRAM and SDRAM.Through the comparison of the direct digital frequency synthesizer(DDFS)and the direct digital waveform synthesizer(DDWS),the DDWS is adopted to adapt the burst transmission feature of SDRAM.To realize uniform output of non-uniform waveform data,asynchronous FIFO is used to manage the data rate and output characteristics of SDRAM is analyzed to adaptively adjust the data.With the structure of “FPGA + SDRAM + DAC”,the method of parallel processing is applied to break through the speed limitation of the device and the 4GSPS sampling rate is finally realized.2.Hardware circuit.To precisely adjust the amplitude of the output signal,a precise DC level generator is used to provide the reference voltage for the DAC.In the synchronous mode,the clock management chip is utilized to control the data clocks of dual-channel to ensure the synchronization of the data clocks between two channels.For the realization of the timing deviation control of the marker signal,the delay line is employed to precisely adjust the delay of the marker control signal under the structure of “FPGA + pin driver”.3.Logical design.To accurately control the read-write of the waveform,the operating feature of SDRAM and the memory interface scheme of FPGA are analyzed in detail.With the use of sequence waveform synthesis technology and microcomputer instruction structure,the waveform address generator is designed to solve the problem,which is difficult to realize the count and storage in traditional address generator when synthesizing advanced sequence waveform.By using the high-speed serial-to-parallel conversion interface of FPGA,the phase detection of the data clocks generated by two DACs is implemented.According to the results of the phase detection,the phase adjustment of the waveform data is carried out and the synchronization of dual-channel is finally realized.After the test and verification,the maximum sampling rate of the designed arbitrary waveform synthesis module is 4GSPS,which can realize the output of the sequence waveform and the waveform edited by the users.The arbitrary waveform synthesis module can also output the function waveform,whose frequency is 2kHz to 1.5GHz.In the synchronization mode,the initial deviation of dual-channel output waveforms is less than 200 ps.The pulse width and position of the marker signal are adjustable and the adjustment resolution is 4 sampling points.