Design And Implementation Of TD-LTE Baseband Demodulation System Based On FPGA

In recent years, wireless communication is rapidly into people’s lives. Especially the 4G network is wide-spread, LTE standards are increasingly sophisticated and mature. The efficiency of LTE chip manufacturers for mass production of chip-related test is increasing rapidly. Build the TD-LTE test and verification platform to solve problems the chip design have to face, which include RF, vector modulation, demodulation, and other verification testing and other major issues is especially important.In order to satisfy the needs of TD-LTE physical layer testing, a demodulation test system of TD-LTE baseband which based on FPGA is designed in this thesis. The demodulation test system is mainly composed of the AD module, FPGA substrate and upper computer system. AD modulation responsible for collecting data from the input data. FPGA substrate include OFDM symbol synchronization, FFT operation, demodulation and Viterbi decoding. The upper computer system responsible for coordinating system configuration and calculating parameters. In OFDM symbol synchronization part, a new synchronization algorithm which based on the classic Park algorithm in this thesis is implemented.A new metric function is constructed in this algorithm and the result can generate two main peak.The problem which the classic Park algorithm has a poor performce in poor SNR environment is solved through this method. This algorithm is simulated in Matlab and compared with the Park algorithm. This improved algorithm shows accuracy result in poor SNR environment. BPSK, QPSK, QAM 16 and QAM64 demodulation and Viterbi decoding are also implemented in the following of this thesis.Keysight vector signal source and auxiliary Matlab toolbox are used to generate the standard LTE signal.The result shows that the EVM test result between this system and Keysight 89600 software is less than 10%. When doing maximum number of points for the 2048 OFDM demodulation and the modulation mode is QAM64, maximum time of dealing with a frame is less than 1ms.To measure the BER curve which the SNR between 10 and 20 dB, Keysight vector signal source is used to generate 2048000 QAM64 symbol which in the PDSCH channel, the result shows that the BER can be lower than 10-6 when the SNR reached 20dB.Through error analysis in low SNR environment, the improved synchronization algorithm performance well than the classical algorithm. The testing result shows that this test system can meet the demand of LTE design and test system and has a strong scalability.