Design Of Non-binary LDPC-CPM Coding And Modulation System Based On FPGA

In such an era that information technology develops rapidly,information need to be transmitted more accurately and more quickly.However,the reliability and effectiveness of communication is contradictory,high performance coding and high efficient modulation is the key technology to solve the contradiction.The continuous phase modulation(CPM)is an efficient modulation mode with a balance between power efficiency and bandwidth efficiency.Binary low density parity check(LDPC)codes are one kind of closest to Shannon limit encoding at present,and non-binary LDPC codes have better error correction performance and lower error floor compared with binary LDPC codes,moreover,non-binary LDPC codes can eliminate conversion of bits between symbols,reduce the information loss,and improve system performance when combined with the high-order CPM.However,the application of non-binary LDPC and CPM modulation is limited by the problems of the high complexity and the difficulty in hardware implementation.To solve the problems,this thesis studied the algorithm with excellent performance and easy to hardware implementation,and designed the non-binary LDPC-CPM code modulation system based on the FPGA,which is of great significance for the application of non-binary LDPC and CPM modulation technology.Firstly,the thesis introduced the development and application status of LDPC code and CPM modulation technology,and focused on the non-binary LDPC coding and decoding algorithm.The QC(quasi-cyclic)LDPC coding algorithm and Mixed-FFT-BP decoding algorithm were choosed.Check matrix’s sub-matrix had cyclic characteristics in QC-LDPC coding algorithm,so QC-LDPC coding algorithm need low storage and computation;Mixed-FFT-BP decoding algorithm can reduce the use of multiplier and logic resource consumption,also can ensure the operation process data accuracy with lower quantization error.Secondly,CPM modulation and demodulation technology were researched in this thesis,and the CPM signal was decomposed into continuous phase encoder(CPE)and memoryless modulator(MM)to implement using ROM table lookup method easyly.CPM demodulation technology adopted soft input soft output(SISO)detection algorithm.Then,the simulations of code length,code rate,the number of internal and external iterations were made on the non-binary LDPC-CPM code modulation system to analyze theimpact of the system bit error rate performance by using the Matlab software;the simulations of hexadecimal number,correlation length,the modulation index and pulse waveform for CPM modulation were made to analyze the impact on the system bandwidth efficiency,and appropriate system parameters were choosed.Finally,we designed and implemented the non-binary LDPC-CPM system based on the FPGA,verified and tested the system by using the PC software written by Labwindows software.The results showed that the system satisfied the requirement of indicators.