Microcontroller Design Based On A Reduced Instruction Set

Nowadays,people's lives have been inseparable from intelligent electronic products,such as mobile phones,computers and smart home and other intelligent life and entertainment products.Intelligent products can not be a lack of a chip,that is,the microprocessor,microprocessor to add a variety of peripherals and interfaces to form a microcontroller to achieve a variety of functions,microcontroller referred to as MCU.Not just in people's lives,like in the industrial,communications,defense,medical and transportation areas are also indispensable to microprocessors and microcontrollers.This paper is based on a new reduced instruction set RISC-V to design a microprocessor of five-stage pipeline,by analyzing the RISC-V instruction set,design the logic and function of the fetch,decoding,execution,memory and write back of the pipeline,finally,design the peripherals of microprocessor based on Wishbone bus structure,form a microcontroller have practical function,including GPIO,FLASH controller,UART controller and SDRAM controller.Through the compilation of verification code,and use the GNU tool chain to generate binary test code,Modelsim simulation proof,this paper implements 47 instructions of the RISC-V instruction set.The micro controller adds the Wishbone bus and peripheral equipment through the Quartus II logic synthesis,and finally downloaded to the FPGA development platform for the overall verification of instructions and functions,the test results proved 47 instructions of RISC-V instruction set and peripheral controller have passed board-level verification,the design goals of the RISC-V microcontroller are achieved.