Construction,Interface Control And Performance Optimization Of Hf-based Laminated Gate Dielectrics

According to Moore's law,complementary metal oxide semiconductor field effect transistors(MOSFETs)devices are shrinking with their feature size.The traditional SiO2 gate dielectrics have hindered the miniaturization of CMOSFET devices due to their physical limit.The high leakage current seriously deteriorates the performance of the devices and reduces the service life of the devices.In order to avoid quantum tunneling effect and reduce leakage current,the choice of appropriate gate dielectric materials to replace traditional SiO2 has become the primary problem to be solved.Hf-based high-k gate dielectrics with large bandgap,thin equivalent oxide thickness,low leakage current density and high thermal stability have attracted extensive attention in CMOS devices.Due to the coulomb and phonon scattering at the interface between the high k gate dielectrics and the substrate,the electron mobility will inevitably decrease,and the operation speed of CMOSFET devices will be greatly reduced.Therefore,the development of integrated circuits will be greatly improved if the high carrier mobility material is chosen to replace Si.The preparation methods of Hf-based high k gate dielectric materials includes mainly atomic layer deposition,sol-gel method,sputtering method and so on.Comparatively speaking,the growth of the atomic layer is very compact and accurate,but the growth rate is very slow.Sol-gel method has low cost and is easy to operate,but it is difficult to control the uniformity of the films.The quality of the films prepared by magnetron sputtering is relatively good,the operation is convenient and it saves much time,so the magnetron sputtering has great prospects of application.In this paper,rare earth element Y-doped HfO2:gate dielectric thin films(HYO)were prepared by low cost sputtering to fabricate HYO/Si and HYO/GaAs gate stacks.The interface,optical and electrical properties of the films were studied systematically by changing the annealing temperature,passivation layer thickness and annealing temperature of the electrodes.The main research contents and results are as follows:(1)HYO/Si gate stack was fabricated by sputtering,and the effects of annealing temperature on the microstructures,optical and electrical properties of HYO gate dielectrics were investigated.Experimental results show that when Y element is doped into HfO2 thin films,the microstructure changes from amorphous to cubic crystalline,and does not change with the annealing temperature,indicating that the structure of the doped films is very stable.Electrical results show that the leakage current density,dispersion,dielectric constant and oxide trap charge of the HYO gate dielectric films annealed at 400? are optimized,which can be attributed to the suppressed oxygen diffusion and interfacial reaction between gate dielectric film and Si substrate.(2)Al2O3 passivation layer and HYO gate dielectric film were prepared by atomic layer deposition and sputtering.The effects of different thickness of passivation layer on the interface and electrical properties of the HYO/Si gate stack structure were investigated.At the same time,the effects of different annealing temperatures of electrodes on the interface and electrical properties of the HYO/AL2O3/Si gate stack structure were investigated.Experimental results show that the dielectric constant of HYO/Al2O3/Si gate stack can be further increased by growing 1 nm Al2O3 passivation layer and annealing treatment at 250?,which leads to the improved interface chemsirty,the reduced oxide charge density,border trapped oxide,and the reduced leakage current.Leakage current mechanism analysis shows that Schottky emission is not dominant.Under low and medium electric fields,all of the HYO gate dielectric films conform to P-F emission mechanism;under high electric fields,all of the HYO gate dielectric films conform to direct tunneling.(3)HYO/TMA/GaAs gate stack was constructed by atomic layer deposition and sputtering.The effects of different TMA pulse cycles on the interface chemistry and electrical properties of the HYO/GaAs gate were investigated.The effects of annealing temperature on the interface and electrical characteristics of the HYO/TMA/GaAs gate stack were also investigated.Experimental results show that 20 TMA pulse cycles and 300? rapid thermal annealing can optimize the interface and electrical properties of the HYO/GaAs gate stack,effectively inhibit the growth of Ga and As oxides,passivate the interfacial chemical reactions and improve the electrical properties.From the analysis of leakage mechanism,it is concluded that low temperature leakage is mainly caused by P-F emission,Schottky emission and FN tunneling mechanism.