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10 Gbps High-speed Serial Communication Transmitter Design And Research

Posted on:2019-07-12Degree:MasterType:Thesis
Country:ChinaCandidate:J DongFull Text:PDF
GTID:2382330572452058Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the rapid progress and development of human society,the exchange of information between people has become more and more important.Therefore,people pay more and more attention to the efficiency of information transmission.In the data communication system,there are two kinds of communication :parallel communication and serial communication.The distinction between the two communications will be elaborated in the later part,among which serial communication has become the mainstream mode of data communication with its obvious advantages.A new type of 10 Gbps high-speed serial signal transmitter will be studied in this essay.The main working points are as follows:In the aspect of theoretical analysis,the key points of high-speed signal integrity analysis theory is described with the basic transmission mode of several signals.a concise description and explanation of high speed serial signal transmission system will be made from the aspects of inter-symbol interference,equalization technology and the realization technology of interface circuit in this essay.In the aspect of circuit design and simulation verification: the main idea and purpose of circuit design is to convert the original multi-channel input signal data in parallel form into serial input signal data in serial form,and then effectively drive the output load through a series of drivers,so that the purpose signal can transmit in a serial manner without error.The circuit modules in this project mainly include CLK_GEN module,MUX module,DRIVER,CTRL_LOGIC,LDO module and so on,so that the purpose signal is converted and driven from parallel form to serial form.In the aspect of simulation and verification,the simulation verification of each module circuit is completed in order from the inside to the outside,and then the simulation of the whole circuit is carried out.In the aspect of layout design and post-imitation verification: In the layout,TX transmitter is designed with a 40 nm CMOS technology.In the post-imitation verification,the Cadence Caliber tool is used to extract the parasitic parameters of R + C + CC.From the post-imitation results,it can be seen that under typical PVT conditions,the signal can reach a maximum transmission rate of 10 Gbps.The corresponding differential output signal swings between 520 m V and 1280 m V @ 10 Gbps.The eye pattern has a maximum jitter of 2.48ps@10Gbps.A 3-tap pre-emphasis can achieve a maximum weighting gain and the pre_shoot is +5.24 d B@10Gbps.Finally,a detailed description and introduction has been made to the TX transmitter test.The simulation results indicate that the design of the transmitter circuit has a normal function,good performance,stable working state,and satisfy the requirement of the multi-protocol design electrical level indicators.The whole layout area is approximate to 285 um X 255 um.
Keywords/Search Tags:transmitter, parallel-serial, conversion circuit, driver, pre-emphasis
PDF Full Text Request
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