A Design Of A Flyback LED Driver Chip With High PF And Low Thd Based On Primary-side Control

With the increasingly serious global-energy-crisis and the worsening climate and environment,energy conservation and environmental protection has become a hot topic of global concern.Because LED has the advantages of miniaturization,low power consumption,long life,green environmental protection,rich color,fast reaction speed,high efficiency and energy saving,LED lighting is considered to be one of the most important and most promising applications.To meet the requirements of IEC 1000-3-2 international standard which established by the International Electrotechnical Commission?IEC?and further improve the PF and decrease the THD of converter,a single-stage flyback AC-DC converter with low THD based on primary-side control is designed in this thesis.In this thesis,two kinds of line current distortion phenomena are analyzed first,and the corresponding compensation circuits are designed.The first distortion is caused by zero-crossing distortion.This distortion means that the circuit is not working properly due to parasitic capacitance or resonance when input voltage is very small.The specific way to solve the zero-crossing distortion is to add the zero-crossing distortion compensation circuit at the output of the operational error amplifier?AMP?.When the output voltage of the AMP is lower than the critical voltage of zero-crossing distortion,the zero-crossing distortion compensation circuit compensates?increases?the output voltage of the AMP,so that the system is separated from the cut-off state before entering the zero-crossing distortion state,finally the zero current is avoided.When the output voltage of the AMP reaches the critical voltage of zero-crossing distortion,the cross distortion compensation circuit is turned off and does not work.The second distortion is caused by fixed turn-on time control.This distortion means that the line current can not continue sinusoidal change when the input voltage is large,because of the limitation of the control mode.The specific way to solve this distortion is to add a variable turn-on time control compensation circuit.When the line voltage increases or the output voltage is reduced,the output voltage of the AMP is reduced by the increase of the voltage at both ends of the sampling resistor.This output voltage input compensation circuit,the output voltage of the compensated circuit is reduced and the turn-on time of the circuit is increased with the output voltage of the reduced compensation circuit to offset or reduce.The negative impact of the duty ratio on the input voltage of the power grid is reduced,and the modulation of the frequency limit point of the system is realized by the voltage controlled by the conduction time.Through the combination of two compensation circuits,two circuits are coordinated and coordinated when the input voltage is very small and large,and the system has the characteristics of high power factor and low harmonic distortion in the whole line voltage input range.On this basis,the HHNEC 0.35 m 5V/40V HVCMOS process is used to build the transistor level circuit and the system layout in Cadence,then the pre-simulation and post-simulation carry on continuously,the simulation results are all meet the design requirements.Afterwards,the chip which was taped out is tested.The size of the chip is 740um*851um.Under the 90²65V_AC input voltage,the maximum output power of the chip is 20.5W,the power factor of the system is above 0.976?the maximum can reach 0.9965?,the harmonic distortion rate of the system is below 10%?the lowest reach 7.26%?,the system efficiency of the system is above 86%?the maximum can reach 88%?,which are all meet the design requirments.