Space-borne SAR Imaging Processing Based On FPGA

Synthetic Aperture Radar(SAR)is a kind of high-resolution microwave imaging physique radar,which performs two-dimensional imaging of the ground by receiving its own emitted electromagnetic pulses.Space-borne Synthetic Aperture Radar(SAR)is a space-to-ground imaging radar.Compared with the airborne SAR,Space-borne SAR possesses the advantages of strong anti-strike capability,large-area mapping and imaging,which has already played an important part in the space reconnaissance system.Among all kinds of the spaceborne SARs,high resolution and wide mapping spaceborne SAR imaging is even a hot spot in the field of radar imaging.However,the amount of data and algorithm on Space-borne SAR are large and complex.Field Programmable Gate Array(FPGA)is widely applied in the real-time imaging field of spaceborne SAR due to its advantages,such as power consumption,parallel processing and rich internal storage.This article is foucing on researching the design and implementation of the SAR imaging processing through FPGA.Firstly,the development history,research status of Space-borne SAR imaging and the development of FPGA processing of SAR signals are summarized in Section 1.Meanwhile,the content framework of this paper is also introduced.In Section 2,the principle and steps of the Polar Format Algorithm(PFA)are analyzed.Aiming to the large ratio of the azimuth bandwidth to the Pulse Recurrence Frequency(PRF)and the problem of image azimuth aliasing directly based on PFA algorithm,the PFA-based subaperture imaging and its image mosaic algorithm are adopted to divide the large-bandwidth of spaceborne SAR data into several sub-apertures with overlapping parts and complete the imaging process.Then the corresponding solutions are discussed respectively for solving the problems such as scallop effect,image stitching,Doppler center estimation and focus accuracy of the image orientation.In order to verify the above real-time imaging algorithms,MATLAB is adopted for simulation analysis.The overall implementation framework of the Space-borne SAR imaging algorithm shining upon FPGA chip is proposed in Section 3.Then we divide the entire system into six specific algorithm function sub-modules,such as data transmission transpose modules(The transmission of spaceborne SAR echo data to the FPGA chip and the buffering and transposition of the data itself),radar parameter calculation module(calculateing and storeing parameters required by subsequent modules according to existing radar parameters),doppler center frequency estimation module(accurate estimation of Doppler center frequency to improve image quality),subaperture PFA algorithm processing module(two-dimensional compression imaging of subaperture data based on cascading of PCS and SINC interpolation),image mosaic display module(multiple subaperture images for radiation correction,image registration and splicing)and autofocus algorithm module(estimating compensation phase error for high resolution SAR images).Meanwhile,thorough research on the hardware implementation and design optimization of the above six modules are studied respectively.In Section 4,a hardware structure of multi-pulse parallel processing is proposed on the basis of Section 3.By adopting the parallel processing method,the imaging processing speed is increased to 5 frames per second,which is 2~4 times the size of original structure.At the same time,the processing speed is also satified for the requirement of video SAR imaging.Finally,the system is verified and analyzed based on the measured datas of Sentinel-1 satellite in Section 5.When the operating frequency of system is 200 MHz,an 8192*8192 pixels of 32-bit singleprecision floating-point imaging process can be achieved in 5.92 s.The measured imaging data results fully verify the effectiveness of system.At the same time,the works in this paper is summarized and the future direction for improvement is proposed.