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Multiple Resolvers To Digital Algorithm And Decoding System Based On FPGA

Posted on:2021-05-24Degree:MasterType:Thesis
Country:ChinaCandidate:B CaoFull Text:PDF
GTID:2392330605967667Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
Resolver is a kind of electromagnetic sensor that can be used to measure angle and angular velocity.With structural stability,shock resistance,vibration resistance,high and low temperature resistance and other characteristics,resolver can be used in harsh environments and has a long service life.With high accuracy and anti-common-mode interference,the resolver can meet the requirements of some systems for high accuracy cause it has high accuracy and is resistant to common mode interference?Therefore,the resolver is widely used in the fields of mechanical design,manufacturing,aerospace,digital turntables,electric vehicles,etc.However,the output signal of the resolver is an analog signal modulated by a high-frequency carrier signal and a low-frequency angle signal.A special decoding system is required to decode the output signal to obtain the information of angular position and angular velocity.In some applications,for example,industrial robots,radar motion platforms,etc.,require multiple resolvers as position feedback sensors.By using one decoding system that can decode multiple resolver signals will not only achieve a better system integration,but also make it cost effective.FPGA is a new semi-custom integrated circuit developed on the basis of programmable devices such as PAL,GAL,CPLD,etc.It has independently assignable I / O interfaces and configurable logic blocks.Due to the characteristics of large capacity,high computing speed,high integration,and flexibility,FPGA can complete extremely complex timing and combinational logic circuit functions,and at present,has been increasingly used in the fields of communication,digital signal processing,image processing,etc.Therefore,designing a decoding system based on FPGA that can decode multiple resolvers can improve the integration and reliability of the converter system while ensuring decoding accuracy and operation speed.This paper studies FPGA-based resolver decoding algorithm and improves the closed-loop angle tracking algorithm.Compared with the traditional closed-loop angle tracking algorithm,simulation results show that the improved closed-loop angle tracking algorithm has faster step response,and its steady-state error is closer to the theoretical value.In combination with the characteristics of the resolver,this paper designs the hardware of the decoding system for multiple resolvers.A digital power amplifier is used to provide an excitation signal to multiple resolvers.The bus switch and the analog-to-digital converter are used to sequentially perform analog-to-digital conversion on the output signals of the multiple resolvers.This design reduces the arrangement of hardware circuits and reduces system costs.With the combination of the improved closed-loop tracking decoding algorithm and the management of hardware circuit,the decoding software system is designed.As a result,the converter can decode multiple resolver signals with better stability and accuracy.At the end of this paper,an experimental platform is set up.By comparison with a resolver to digital converter PGA411-Q1,the decoding system is verified through experiments.Experimental results show that the decoding system can accurately decode 8-channel resolvers.
Keywords/Search Tags:Resolver, FPGA, The closed-loop angle tracking algorithm
PDF Full Text Request
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