Evaluation And Design Of Majority Gates Based On Quantum-dot Cellular Automata

With the continuous improvement of integrated circuit design and process technology,the feature size of CMOS devices has been gradually reduced,and the integration of chips has become higher and higher.However,with the further reduction of CMOS devices,a series of problems such as high power consumption will follow,which will affect the development of integrated circuits to a certain extent,and Nanoelectronic device may be able to cope with these problems.Quantum-dot Cellular Automata(QCA)has been extensively studied due to its unique information transmission method and faster computation speed.The QCA circuit is composed of majority gates,inverters and a transmission lines according to a certain function.Majority gates as the core logical functional unit,its performance affects the overall state of the circuit.Researches on majority gates will provide important reference value for the in-depth development of QCA circuits.Majority gates are divided into two types,five-input majority gate and three-input majority gate.So far,there are many research results in this category,but there is a lack of overall analysis and induction.This paper selects two evaluation indicators,fault tolerance and energy consumption,respectively,and summarizes the three-input majority gate and five-input majority gate,discusses the design method of majority gates.In the aspect of three-input majority gate,this paper analyzes the existing fault-tolerant three-input majority gates,and summarizes the design skills of fault-tolerant three-input majority gates based on the analysis results,and designs a new fault-tolerant three-input majority gate.Logic function simulation and physical proof verify the correctness of the design.A new 2-4 decoder and a 3-8 decoder circuit are designed on the basis of the existing majority gate.Experimental analysis shows that the design is extremely fault-tolerant and its overall performance is superior to that of its kind.For the five-input majority gate,this paper classifies the currently representative five-input majority gates according to the structure of the corresponding three-input majority gates,and performs energy consumption analysis at the same time.The logic gates are then embedded in one-bit full adder circuit and RAM circuit,respectively,to analyze the overall energy performance.Considering the energy consumption results of majority gates and circuits,the optimal five-input majority gates are given.According to this kind of characteristics,the low-power five-input majority gate design method issummarized.Based on this,a new five-input majority gate is designed.The proposed gate continues to be improved,and two new five-input majority gates for the circuit are obtained,and the rationality of the design is proved by simulation and physical calculation.