Font Size: a A A

Optimization On Process Windows Of Optical Proximity Correctoin For Advanced Logical Integrated Circuit

Posted on:2017-06-26Degree:MasterType:Thesis
Country:ChinaCandidate:J LiuFull Text:PDF
GTID:2428330590490297Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
With the ever shrinking sizes of semiconductor devices,the semiconductor manufacturing has entered the age of submicron and nano-scale lithographic process.In order to tackle various challenges posed by submicron lithographic processes,various resolution enhancement techniques(RETs)that include off-axis illumination,phase shift masks,SRAFs(sub resolution assistant features),and OPC(optical proximity correction)have been developed.These RETs have been extensively applied to the sub-90 nm semiconductor manufacturing.The off-axis illumination with a high NA(numerical aperture)gains a high resolution for the printed images,but at the cost of a reduced DOF(depth of focus).This will make the printed images be sensitive to the fluctuation of the PW(process window)conditions,and result in on-wafer weak points that are out of the specs.The OPC,as an important part of the micro patterning process,is now carrying with a new mission.The engineers expect that the OPC can not only render the printed images to be on target under the nominal condition,but also make them possess an enhanced PW.This work focuses on the two aspects: 1)the SRAF rules for improving the common DOF,and 2)the OPC verification for capturing the weak points with insufficient PWs.The specific topics that are studied in this work are listed as follows.1.The model-based SRAF can produce high quality scattering bars without relying on much human efforts,while the rule-based SRAF has the advantage of the high speed,demanding less computational resource.After exploring the synergy between these 2 SRAF methods,we come up with a model-driven rule-based SRAF scheme.2.Considering the factors,that include the PW weak points,mask fidelities,the printing avoidance for SRAFS,and so on,allows us to develop an optimized model-driven SRAF flow.We first make use of ILT(inverse lithography technique)approach to obtain the pixelate SRAFs.Various simplification schemes that convert these pixelate SRAFs into manufacturable patterns generate different test splits.These splits will be further refined using the wafer data;and we will select the best split in terms of the actual PW and extract the SRAF rules from the split.The resulting model-driven SRAF rules will be applied to the full chip so as to enhance the PW globally.3.We have compared the effects of OPC verifications based on the nominal and PW conditions,respectively.It was found that the OPC verification that use a certain defocus PW condition is the most effective in detecting the actual on-wafer weak points.
Keywords/Search Tags:OPC, SRAF, ILT, OPC Verification
PDF Full Text Request
Related items