The Design Of The Front-end Conditioning Circuit For EEG Signal Acquisition

The electroencephalogram contains abundant physiological information and is an important biopotential signal of the human body.In recent years,with the rapid development of integrated circuit technology and biomedical equipment,the analog front-end design that can handle weak bioelectrical signals has become a research hotspot in the field of chips.The front-end conditioning circuit for collecting EEG signals is of great significance.In this paper,a 0.18?m CMOS process is used to design an EEG signal acquisition front-end conditioning circuit with high common-mode rejection and low power consumption.The circuit includes a voltage adjustment circuit,a bandgap reference circuit,a current instrumentation operational amplifier,a gain stage operational amplifier,filters and other modules.The overall simulation of the circuit shows that the voltage adjustment circuit outputs a stable 1.8V voltage as the operating voltage of the subsequent submodule,the front-mode instrument op amp has a common-mode rejection ratio of 113.2dB,a gain of 20dB,and a gain bandwidth of 14.3MHz,the high-pass cutoff frequency is 0.505Hz,the low-pass cutoff frequency is 102.6Hz,the gain stage op amp gain is 53.92dB,and the equivalent input noise is133.2nV/sqrt(Hz)@107Hz,the total harmonic distortion is 0.15%,the current consumption is 241?A.The circuit completes the effective amplification of the signal and satisfies the design requirements of the EEG signal front-end conditioning circuit,the overall power consumption of the circuit is 0.434mW,the layout area is 0.304mm~2,and it has passed the DRC and LVS verification.