Research On Digital Watermarking Algorithms For Medical Images

Digital watermark technique is a new research field in information security,which is a new technique extensively used in open network environment to protect copyright,authenticating source and completeness,protecting multimedia copyright and image authentication.Because of the particularity of medical image,medical image contains personal inspection information and results,and after adding digital watermark,it has the role of authentication and protection.It is so slow to implementation the image digital watermarking system with software that it can’t satisfy the real-time processing requirement.In order to improve the processing speed,hardware is to be used to implement the digital watermarking algorithm because the hardware implementation has faster speed and important significance.Based on FPGA(Field Programmable Gate Array)hardware platform,in this paper we researches and implements the second-level lifting wavelet transform algorithm to embed digital watermark in multiple subbands and improves the speed of watermark embedding and extraction.The major content of this paper is consisted of:1.Study of Matlab implementation of two-stage lifting wavelet transform.Because the performance of discrete wavelet transform determines the digital watermarking algorithm is too slow,this paper takes discrete wavelet transform as the main line,analyzes the operation process of lifting wavelet transform,and designs an algorithm based on lifting wavelet transform to embed watermark in multiple subbands,Matlab simulation to verify the feasibility,invisibility and robustness of the watermarking algorithm.2.Research on FPGA implementation of digital watermarking algorithm.In this paper,we design a hardware watermarking architecture that can be implemented by using the idea of top-level design and modular design.The hardware design is realized by Verilog hardware description language.All the functions of the designed hardware are verified by simulation.In this paper,Arnold scramble module,RAM module,control module,such as functional simulation and timing simulation to verify the function of the circuit,and finally the top-level modules were synthesized RTL-level circuit structure.3.The design of watermarking system is realized by FPGA,and the watermarking is embedded and extracted by this system,and the image after embedding watermarking is obtained.Through the attack experiments such as noise attack,compression attack and histogram equalization on the watermarked image,After extracting the attacked watermarking image,the watermarking algorithm is used to prove that the proposed algorithm has better concealment and robustness.4.Based on the realization of embedding and extracting watermark in FPGA,this paper collects the time needed to embed watermark in multiple images and makes statistical regression analysis.The regression equation is obtained.The results show that the data are uniformly distributed in the regression equation Annex,the regression equation showed a good fit.