Low-power CMOS rectifier and Chien search design for RFID tags

Automotive sensors implemented in radio frequency identification (RFID) tags can correct data errors by using BCH (Bose-Chaudhuri-Hocquenghem) decoder, for which Chien search is a computation-intensive key step. Existing low power approaches have drastically degrading performance for multiple-bit-correcting codes. This thesis presents a novel approach of using register-transfer-level (RTL) power management in the search process, leading to significant power savings for BCH codes with higher correction capability. An example for the (255, 187, 9) BCH code has been implemented in 0.18mum CMOS technology.;We also consider ways of conserving power for the sole power harvester on a passive tag -- the rectifier. With ST CMOS 90nm technology, a three-stage differential-drive CMOS rectifier is designed by using a new transistor scaling method and a piece-wise linear matching technique. For the standard 915MHz band, simulation indicates high power conversion efficiency (PCE) of 74% and a significantly increased output power of 30.3muW at 10 meters.