High speed protection relay algorithms for transmission line protection and fast bus transfer schemes

For high-speed fault clearance in power systems, protective relay algorithms should process the power system voltage and current signals to arrive at a decision to isolate a transmission line or any other primary equipment connected to the power system. Since power system is a tightly coupled network, every millisecond during this abnormality is crucial for ensuring its stability. During this process, the primary equipments are also subjected to heavy fault currents, which directly reduce their lifetime.; In this thesis two new high speed relaying algorithms for phasor estimation are proposed and based on the algorithms a sub-cycle distance relay and a high speed bus transfer technique have been developed and tested.; The first high speed algorithm provides an accurate phasor estimate of the voltage and current signals in about 8 milliseconds after the fault has occurred. A unique out-of-band filtering technique has been proposed to remove the decaying do components and harmonics, which corrupt the fundamental phasor during transient conditions. The filters are designed using least error squares technique. The second algorithm provides a phasor estimate of the power system voltage and current signals using the same out-of-band filtering technique but designed using full cycle Fourier filters with an improved transient and frequency response.; The algorithms proposed to estimate the phasors are used in designing a distance relay providing an operating time of less than one power system cycle (16.67 msec). The distance relay's performance was studied by developing a prototype using suitable hardware and tested for various power system configurations using the Real Time Digital Simulator. The performance of the developed relay is also benchmarked with published operating time characteristics of two commercial transmission lines protective relays.; A modified second algorithm has been used to estimate the motorbus open circuit time constant using which a new technique for high-speed transfer of motor loads from main bus to alternate bus, when the main bus is de-energized, is proposed.; The performance of the algorithms and the techniques are tested for a wide variety of test cases and their performance is found to be satisfactory.