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Research On Low Roughness Of GLSI Multiayer Copper Interconnect Barrier

Posted on:2021-04-26Degree:MasterType:Thesis
Country:ChinaCandidate:C WangFull Text:PDF
GTID:2481306560951959Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
With the continuous development of the market,integrated circuits(IC),as the core of the semiconductor industry,has been becoming more and more technically complex.Now that the technology node has entered the 3 nm node,the international requirements for the performance of wafers in IC is becoming higher and higher,and the number of multilayer metal interconnection layers is also increasing,which proposes a higher challenge to the planarization performance between each layer of wiring.Chemical mechanical planarization(CMP)is one of the core processes of wafer manufacturing and is the only technology that can achieve global and local planarization.In this paper,with the support of the National 02major project,it is studied about the surface quality of the existing alkaline polishing slurry after CMP.The main goal is to achieve a low surface roughness of the multilayer copper interconnect barrier layer.The main research contents of the paper are as follows:1.The main component of abrasives in alkaline polishing fluid was studied.First,the particle size and concentration of the abrasive silica sol were analyzed,and the surface roughness was the smallest when the particle size was 60 nm and the concentration was 15wt%.Then,applying chemical mechanical polishing,contact angle measurement and SEM detection,the specific ratio of other components in the polishing liquid that achieves low surface roughness was determined.It was included FA/O ? chelating agent 0.15 wt%,potassium citrate 3 wt%,abrasive 15 wt%,and the hydrogen peroxide(H2O2)0.01 wt%.The p H of the polishing solution was adjusted to 9.The optimized polishing solution successfully reduced the surface roughness from 0.0215?m to 0.293 nm,which was a decrease of more than 98.6%.The rates for Cu/Ta/TEOS were 637.72(?)/min,677.76(?)/min,and 650.20(?)/min.It satisfied the rate selection ratio Ta+TEOS>2Cu,and the dish-shaped pit was modified from 870(?)to 376(?),which was favorable for planarization.2.Basic and in-depth research on the CMP process conditions,the optimal polishing process conditions for multilayer surface copper interconnect barrier polishing with low surface roughness were achieved.It is obtained the polishing pressure 1.5 psi,the polishing head/disc rotation speed 87/93 rpm,and polishing fluid flow rate 300 ml/min.After studying the optimized process conditions,the copper surface roughness of the barrier layer was reduced from 0.0216?m to 0.248 nm,and a better surface quality was achieved.The second was to filter the large particles in the silica sol and study the different sizes of the filter.It was concluded that the large particles in the silica sol are mainly concentrated in the filter between 1?m and 0.5?m,and the best surface quality can be obtained after the 1?m+0.5?m filtration,which lays a good foundation for subsequent defect research.3.In terms of theory,it is pointed out that the main factor affecting the surface roughness is large particles,and innovatively proposes compound complexing agents and compound surfactants,and establishes relevant impact models.It also proposes the mechanism and action mechanism of K+effect rate.The mechanism of reducing the surface roughness of the compound surfactants is to enhance the surface wettability and prevent the aggregation of particles.It also provide important theoretical basis and reference value for the subsequent study of the barrier layer CMP.
Keywords/Search Tags:integrated circuits, surface roughness, chemical mechanical polishing, barrier polishing fluid, composite complexing agent, composite active agent
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