Design Of 10GHz Divide-by-4 Frequency Divider For Continuous Wave Radar Frequency Source

Automobile continuous wave radar is the core component to realize the active safety function of automobiles.Phase Locked Loop(Phase Locked Loop,PLL)frequency synthesizer is an important part of continuous wave radar,it provides low phase noise,high stability local oscillation signal for RF transceiver in continuous wave radar.The divider circuit is one of the most important sub-modules of the PLL.It works at the highest operating frequency of the PLL frequency synthesizer and is difficult to design.Therefore,it is of great importance to design a divider with low power consumption,high speed,and high stability.In the frequency divider circuit,since the operating frequency of the programmable frequency divider is limited,a frequency divider with a fixed frequency division ratio is usually used to preprocess the output signal of the voltage-controlled oscillator.Then the output signal is used by the programmable frequency divider.Based on 0.13μm SiGe BiCMOS process,this paper designs a divide-by-four divider with operating frequency of 10GHz.The divide-by-four divider consists of two-stage divide-by-two dividers cascades,an inter-stage buffer is designed for level matching between the two-stage divide-by-two dividers.An output buffer is designed to drive the test instrument at the output of the divide-by-four divider.The two-stage divide-by-two divider is composed of a flip-flop with a wide operating frequency range and high sensitivity.The flip-flop uses the current mode logic(CML)structure to determine the device parameters by optimizing the self-resonant frequency.Emitter follower structure is used in the inter-stage buffer,which converts the level of the output signal of the pre-stage divide-by-two divider to drive the post-stage divide-by-two divider.The output buffer uses the differential amplifier structure,which effectively reduces phase noise while driving the test instrument.Circuit design,pre-simulation,layout design,electromagnetic field mixed post-simulation,test plan and test results were performed.With 3.3V power supply voltage and 0d Bm input clock signal,the test results show that under the 27°C,the divide-by-four divider operates in the frequency range of 2-28GHz and the phase noise is-111.57d Bc/Hz at 1k Hz and-140.22d Bc/Hz at1MHz.The operating current is 29.5m A,the total area of the layout is 740×411μm~2.The 10GHz divide-by-four divider designed in this paper has correct function and the test result meets the requirements of the index.It can be applied to the automobile continuous wave radar frequency source chip.