Design And Implementation Of 20M 1553B Avionics Bus Based On PCI

Since the establishment of the MIL-STD-1553 B bus standard,the 1553 B bus has become more and more widely used in military and civil field.However,most of the related products based on this protocol can only support data transfer rate of 1Mbps,which is difficult to meet the current military and civilian systems’ demand for high data transmission rate.Therefore,this thesis makes a deep insight into the design and implementation of the high-speed 1553 B bus system based on the MIL-STD-1553 B bus protocol,so that it can improve the data transmission rate while being compatible with the original 1553 B bus system.For the design and implementation of the high-speed 1553 B bus system,the working principle of the MIL-STD-1553 B bus protocol is analyzed in detail,and the characteristics of the high-speed 1553 B bus system are summarized according to the requirements of its basic structure and redundant design.Subsequently,based on the design requirements of the high-speed 1553 B bus system,the topology,redundancy design,communication scheduling and other aspects of the high-speed 1553 B bus system are analyzed and designed,and a PCI-based 20 M 1553B avionics bus module design is proposed.This design introduces a dual-redundant design structure,and its topological structure adopts star connection structure.In this way,the response time of the system can be effectively reduced,and the interference between various node devices on the bus can be reduced,which effectively improves the stability,reliability and real-time performance of the bus system.This design takes FPGA chip,PCI9054 and RS485 interface chip as the core,and uses FPGA logic circuit to realize the core function of interface module protocol processing,the integrated design of BC/RT/BM,the logic control between 1553 B bus interface circuit and PCI bridge chip.This implementation has low cost,high flexibility and strong applicability.According to the design plan,the interface signals,register list and state machine of each module of the bus system are analyzed and designed,and each module of the bus system is realized through Vivado programming,and each module is simulated and verified by Model Sim.Finally,combining the logic design and resource requirements of the bus system,the selection of components is carried out,and the interface circuit design and system hardware design of each module are completed.The hardware test platform of the high-speed bus system is built,and the communication function and technical indicators of the bus system are tested according to the 1553 B bus protocol standard.The test results show that the communication function and technical indicators of the bus system meet the design requirements of the high-speed bus system,and the data transmission rate of the bus system has reached 20 Mbps.