The Design And Realization Of 1553B Bus Testing System

This paper discusses the design and realization of the Testing system of a certain avionics, investigating primarily the development of the hardware and software and the system composition.The 1553B Bus Testing system is based on a versatile, half size 16-bit ISA Bus printed circuit card designed for the test and simulation of MIL-STD-1553 systems. It provides full, intelligent interfacing between the serial dual redundant MIL-STD-1553B data bus and the PC. User-friendly software allows the Testing system to simultaneously simulate a Bus Controller(BC),multiple Remote Terminal Units(RTUs), and/or a selectable Bus Monitor(MT). The intelligent MT captures the 1553 bus traffic. The user can define when MT operation is to begin and which messages(based on the RTU address, T/R bit, and subadress) are to be captured. Monitored information is displayed on a message by message basis.A full digital solution implemented by digital signal processors and programmable logic circuits to the 1553B Bus Testing system is presented in this paper, with the focus on the techniques of TMS320VC5410A interface design and boot loader design and the design flow and scheme of implementation of ISE using FPGA chip XCS30XL-PQ144C. The method indicate that this digital solution leads to much less costly and much more value.The testing system can assure the bus controller or remote terminals designed to meet the requirements of MIL-STD-1553B. The working effect has been highly appreciated in practice.