Research And Implementation Of High-performance TTE Bus Digital Modelling

Onboard data bus technology is one of the most important key technologies for modern advanced aircraft telecom control systems and avionics integration.The advanced degree of avionics is affected by computer network technology,and also affects the performance of avionics system.Time-Triggered Ethernet（TTE）bus is based on the SAE AS602 time synchronisation standard and has the advantages of high reliability,determinism and no congestion,etc.It has been widely used in the aviation field.The virtual flight control platform is widely used in the development and debugging of airborne systems and avionics applications.The TTE bus model is digitally modeled,and the digital models of TTE end nodes and bus switches are built,which can provide digital models of interconnected devices between node models of distributed real-time systems such as virtual flight control computer systems.It is of great significance for the development of flight control systems based on the TTE bus model and the design and verification of various on-board software.The specific research and work in this thesis is as follows.（1）For the TT service scheduling table generation algorithm,this thesis proposes a PSO-TS-TDGA algorithm combining particle swarm and improved genetic algorithm.Compared with the traditional genetic algorithm,the idea of forbidden search is incorporated in the crossover operator and variation operator of the population,and a twodimensional crossover operator is proposed for modelling the TTE-based scheduling solution problem.After simulation experiments and scheduling verification,the PSO-TSTDGA algorithm outperforms the traditional heuristic TT service scheduling table generation algorithm.（2）By learning the modelling mechanism of QEMU simulator,we designed and implemented the TTE bus end-system modelling based on the virtual flight management computer of Power PC architecture,which can realize flexible conversion of end-system in synchronous roles;using QEMU,we built Min Switch,a minimal system that can configure the interconnection method between TTE switches,which can be flexibly configured with the end-system digital model of TTE bus structure.（3）The initialization verification of the TTE bus digital model built in this paper was completed at the flight control system and driver levels,and the verification of the TTE bus digital model and the minimal system Min Switch of the TTE bus switch in the time synchronization service and TT service scheduling service was completed.The TTE bus digital model designed in this paper has been applied to the digital model of a hybrid critical system multi-core fault-tolerant computer in an aviation computing institute,and good application results have been achieved.