| Analog to digital converter(Analog to Digital Converter,ADC)is a bridge between the analog signal and the digital processing system in the signal processing system.Its main purpose is to convert the input analog signal into a digital output code at the corresponding reference level.This completes the signal acquisition and signal processing operations.With the improvement of the development level of digital circuits,ADC,as a key device to realize the conversion of analog signals into digital signals,has also been widely cited.SAR ADCs are widely used in processing systems that require moderate conversion speeds,and need to reduce circuit power consumption and medium accuracy(usually 8-16 bits).According to the circuit structure of SAR ADCs,it can be found that SAR ADCs can be used for asynchronous signals.The conversion does not generate channel delay,which has the advantages of simple circuit structure,few analog modules,and easy integration.And because the operational amplifier required by other ADCs is not needed,only DAC arrays,comparators,and digital control logic are required,so It has the advantages of low power consumption,and is not affected by the short channel effect caused by the reduction in device feature size.This paper is designed for the circuit design of SAR ADC based on TSMC 40 nm 1.1V CMOS process 12 bit 32MS / s.First,an ideal model is built and simulated on the MATLAB platform for a fully differential non-binary redundant SAR ADC to verify its correct behavior.Analyze and simulate the non-ideal factors that affect the accuracy of SAR ADC.Research on the capacitance mismatch calibration technique of DAC capacitor array in SAR ADC.Digital calibration technology can effectively reduce the impact of capacitance mismatch errors,thereby improving the linearity of the SAR ADC.At the same time,it can also reduce the system’s requirements for analog circuits,further reduce the overall system power consumption,and reduce the difficulty in designing analog circuits.The DEM calibration algorithm is used in this design to solve the impact of non-ideal factors on ADC performance and improve SAR ADC performance.Then the whole circuit is designed and simulated based on the Cadence software platform.SAR ADC circuit design includes gate voltage bootstrap sampling switch module,nonbinary DAC capacitor array module,two-stage full dynamic comparator module,asynchronous SAR control logic module and code conversion module.The article expounds from the aspects of the overall circuit structure,the internal structure of each circuit module and the simulation results and the overall SAR ADC simulation results.In order to suppress power supply noise and common mode noise,a fully differential structure is used to eliminate errors in the form of common mode signals.Using the high linearity gate voltage bootstrap sampling switch with substrate modulation as the sample and hold circuit of the SAR ADC can effectively suppress the nonlinearity in the sampling process.Compared with traditional switching timing circuits,the use of Vcm-based switching timing effectively reduces the power consumption during SAR ADC conversion.After the nonbinary quantization algorithm is adopted,the overall circuit system can improve the tolerance of the error caused by the incomplete establishment of the DAC.Due to the appropriate reduction of the DAC settling accuracy requirements,the settling time required by the DAC can be reduced,which is very advantageous for the realization of high-speed SAR ADCs.The size of the three-state switch that controls the capacitor can also be reduced,which is beneficial to further reduce the power consumption of the SAR ADC.The SAR control logic uses asynchronous control logic to further reduce power consumption.A sampling network is formed by a bootstrap switch and a fully differential non-binary redundant DAC capacitor network,and the digital logic part includes combinational logic of control logic and decoding switch.Based on TSMC 40 num 1.1V CMOS process,complete the circuit design and simulation of each key unit,and the functional simulation and performance simulation of the overall SAR ADC,the final simulation results show that the function of this SAR ADC is correct. |