| Compared with traditional power silicon-based devices,enhanced gallium nitride(Ga N)devices have higher switching speeds and are widely used in various high-frequency power systems.The isolated gate driver chip is a power driver chip that can provide high driver rate and high isolation performance,which can effectively improve the anti-interference ability of Ga N power devices in high-frequency system applications.As the core circuit,the high-voltage level shifter circuit directly affects the transmission rate and reliability of the chip.Therefore,it is of great significance to study the conduction characteristics and anti-noise ability of the fully isolated high-voltage level shifter circuit.In this thesis,the advantages and disadvantages of three isolation methods,namely,optical isolation,magnetic isolation and capacitive isolation,are analyzed in depth according to the design requirements of isolated gate driver chip,and it is pointed out that capacitive isolation has the advantages of high speed and easy integration.Then through the simulation analysis of capacitive isolation technology,it is found that the traditional capacitive isolation level shifter circuit has a contradictory relationship between anti-interference ability and output waveform stability.In response to this problem,a highly reliable capacitor fully isolated level shifter circuit is proposed in this thesis,which consists of an oscillator,an amplitude modulation circuit,a fully differential common-gate amplifier circuit,a fully differential amplifier circuit and a detection circuit.A fully differential common-gate amplifier circuit with cross-coupling bias is used to eliminate common-mode noise signals and the envelope is formed.At the same time,the front-stage energy transfer is added to the fully differential amplifier circuit to amplify the amplitude of the envelope and the envelope is shaped and output by the detection circuit,which improves the circuit’s suppression supply noise.Based on the CSMC 0.18μm BCD process platform,a highly reliable capacitive isolation level shifter circuit is designed and post-simulation is performed.The simulation results show that the transmission delay is 12 ns,the noise suppression is 120V/ns,which meet the design requirements. |