Research On Verification Of Image Compression Algorithm Module Of AMOLED Driver Chip Based On UVM

With the continuous improvement of AMOLED screen resolution and the screen display frame rate from 60Hz to 120Hz,the performance requirements of the display driver chip are getting higher and higher^[1].The improvement of performance means the improvement of chip complexity.In order to reduce the chip area without sacrificing performance,in addition to the scaling of process nodes,various manufacturers have added image compression algorithm modules inside the display driver chip.With the update of display technology,image compression algorithm modules are more complex,and at the same time,since the verification work occupies a considerable amount of time in the entire R&D cycle,it is extremely important to adopt an efficient verification method.Traditional verification platforms face the extremely high verification requirements of image compression algorithms and cannot guarantee their verification efficiency and completeness of function coverage.Therefore,it is of great significance to study verification platforms for image compression algorithm modules.The source of this subject is the functional verification of the VESA standard image compression algorithm module participated in by the intern unit.This module is mainly used for image processing of the display driver chip,decompressing the compressed data packet sent from the host computer into the brightness data and chrominance data processed by the display driver chip.Due to the various types of image information processed by the image compression algorithm module,in order to ensure the completeness and efficiency of the verification,this topic chooses to use the UVM verification methodology to build the entire verification platform.This topic first extracts the function points according to the algorithm specifications,and then designs each verification component according to the interface characteristics and timing characteristics of the module,and integrates all the components into the verification platform according to the built-in mechanism of UVM.Then design corresponding test cases according to the function points of the image compression algorithm.This subject considers that the verification platform needs to establish a register model,and the register model needs to add more than 26 configuration information,so this subject innovatively develops a Perl-based automatic register model generation tool.Finally,this subject conducted a random test and a directed image collection test,and collected the corresponding code coverage and functional coverage.This subject builds a verification platform for the VESA standard image compression algorithm module based on the UVM verification methodology.After 14,000 equivalent1920×1080 resolution pictures are tested,the code coverage of the VESA standard image compression algorithm module will eventually be improved.That's 96.93%.And analyze the uncovered part of the code coverage.At the same time,the function coverage rate has reached 100%,indicating that the function point coverage of the module to be tested is complete.So far,this functional verification work has basically met the established requirements of the verification plan.At the same time,in the process of building a verification platform for this subject,automated tools developed using scripting languages significantly improved the efficiency of building a verification platform.Compared with other verification platforms,the verification platform based on UVM verification methodology has the advantages of strong reusability,clear structure,and a large number of test cases with different requirements while ensuring the complete coverage of function points,which greatly reduces The possibility of functional loopholes in the chip development process shortens the entire chip development cycle.