Research And FPGA Implementation Of Lightweight Key Generator Based On BST-APUF

As Io T devices are widely used in various fields such as electricity,medical treatment,and transportation,their safety issues have become increasingly prominent.Among the existing security threats,the attack on the key is the most destructive threat.Physical Unclonable Function（PUF）is a new type of hardware security technology that can resist intrusive physical attacks,and its output response is unclonable.The PUF-based key generation scheme has the advantages of low cost and high security.However,the PUF circuit has a special structure and is easily affected by the external environment（temperature,voltage,etc.）,and the response is unstable.It is necessary to use an error correction mechanism to extract a stable key.The existing error correction schemes are generally too expensive and have been proven to exist Potential safety hazards.Therefore,in this paper,aiming at the problem of insufficient reliability and excessive error correction overhead of PUF,this paper studies a lightweight reliable key extraction method.The specific research content includes:First,the basic principles and evaluation criteria（reliability,uniqueness,bias）of PUF are introduced,and the design principles and working methods of several typical PUFs are described in detail.By analyzing the key generation application of PUF,it is pointed out that PUF is in secret.Key issues that need to be solved in key generation applications.Then,aiming at the shortcomings of traditional PUF key extraction methods,a new type of bit-self-test PUF（Bit-Self-Tests PUF,BST-PUF）model is proposed,and the specific implementation process of this model is introduced.Based on the expansion of the new model,a lightweight key extraction auxiliary algorithm is presented,the execution process of the algorithm is described,and the correlation between the response and auxiliary data is theoretically analyzed,and the security of the algorithm is proved.Finally,the new type of key extraction auxiliary algorithm is applied to the arbiter PUF,and a lightweight bit-self-test arbiter PUF（Bit-Self-Tests Arbiter PUF,BST-APUF）key generator is designed,which is suitable for hardware The module has undergone functional simulation and Field Programmable Gate Array（Field Programmable Gate Array,FPGA）verification.Among them,the maximum bit error rate of the robust response of the BST-APUF circuit module is 4.46×10^-9,the Hamming weight is 53.2%,and the average inter-chip Hamming distance is 49.1%.The key sequence has passed the NIST randomness test and is greater than 130,000 key recovery tests.The hardware resource overhead of the new key generator is 276 registers and 397 LUTs.Compared with the existing PUF key generation scheme,the advantage is that it uses fewer auxiliary data and hardware resources,and can be used for lightweight Io T Low cost and high security protection of the device key.