| With the rapid development of communication technology and integrated circuit,electronic equipment has become a part of people’s work and life.However,normal operation of various electronic devices is managed by power management chips,one of which is Switching mode power supply management chip.It has been in widespread use in various fields,including battery-powered portable electronic devices,such as Bluetooth keyboards and mouses,headphones,and home blood pressure monitors,due to its high conversion efficiency,good stability and small size.Higher demand in market leads to an expectation for higher conversion efficiency in SMPS management chip.Once high conversion efficiency is acquired,then the battery life of portable electronic devices will be significantly increased and product competitiveness will be enhanced.Therefore,it is meaningful to study high-efficiency DC-DC converters.In this thesis,a full-load high-efficiency step-up DC-DC converter based on PWM/PFM modulation mode is designed,which can automatically switch between PWM and PFM mode according to the variation of load current.At light load,the system works in PFM mode,switching loss is reduced and conversion efficiency is effectively improved.Adding the peak current limit of the inductor,and then the output voltage ripple is also reduced.In the DCM state,sleep mode circuit is used to reduce static power consumption,and an anti-ringing circuit is proposed to further improve the light-load conversion efficiency while reducing electromagnetic interference.As for the design of module circuit,a circuit structure with lower power consumption is selected under the premise of reaching the demand of designed specification.Voltage reference is built with a depletion-mode field-effect transistor structure,which has extremely low static current,and a soft-start is added.Ring oscillator with a simpler structure and lower power consumption is selected for the design of oscillator.Current sampling circuit is designed by on-resistance sampling with no extra power consumption.In addition,a true shutdown circuit is also added.When shutdown is enabled,the true shutdown of input and output channels is realized,which further improves the battery life.The peripheral devices required for application of the chip designed in this thesis include an inductor for energy storage and two capacitors for filtering.Optimal values of the two are obtained after analysis of the peripheral circuit.The DC-DC converter in this thesis is designed with ASMC 0.18μm CMOS technology,and simulated on the Cadence spectre platform to verify if the simulation result reaches the design specifications,and then the layout design is further completed.The chip is measured after tape-out.Results show that typical value of the output voltage is 3.3V.At 10 m A light load,the conversion efficiency reaches 92.5%,and the output voltage ripple is about 7m V.The maximum efficiency at full load can reach 93.1%,and when the load current is less than 200 m A,the system efficiency consistently maintains above 85%.In addition,the chip’s load regulation and load response characteristics perform well,and design requirement is finely reached. |
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