Design And Implementation Of Telemetry Data Memory Based On FPGA

With the rapid development of data acquisition and storage technology,as an indispensable part of the flight process of aircraft,telemetry data storage plays an important role in data acquisition and recovery.By collecting and storing telemetry data during flight,and after the flight is completed,the data is read back and analyzed by the test bench,which is beneficial to the optimization and improvement of aircraft performance.The telemetry data memory designed in this design consists of a sampler and a memory,focusing on the design of the interface between the sampler and the test bench,multi-channel data mixed framing,and memory storage methods.The telemetry data storage needs to collect 1 channel of 1553 B bus data,1 channel of PCM data with a code rate of 1.966 Mbps,and 6 channels of analog data with a sampling rate of 1 k Hz.Firstly,this paper investigates the research status of telemetry data storage at home and abroad,and builds the overall framework of the system based on technical requirements and specific application environments.According to the modular design idea,the logic and circuit of the device are divided according to different functions,and the working principle of each module is introduced in detail.Three key technologies involved in the scheme are specifically studied:1.Regarding the 1553 B bus data acquisition technology,the device will simultaneously play the roles of the bus terminal RT and the bus monitor MT.As the RT,it is responsible for responding to and executing various instructions issued by the bus controller BC,and as the MT,it is responsible for monitoring all data on the bus,and distributing the monitoring data to the memory for data storage;2.Regarding the data mixed framing technology,a scheme design was first carried out,introducing the FIFO based cache structure,and based on this,the framing scheduling of each channel of data was carried out;By adding identifiers to different types of data,the readability of each data path in the memory is ensured;Finally,FIFO read and write reliability and cache redundancy were studied;3.Regarding data storage technology,it introduces the selection and initialization of the chip,describes in detail the detection and marking methods of bad blocks in NAND FLASH chips,and replaces bad blocks to ensure data integrity;This paper introduces the specific process of writing data into a chip.The multi plane pipeline programming method saves data transmission time and improves the efficiency of data transmission;A method of ECC verification and error correction is designed to ensure the accuracy of data transmission.Finally,by building a test platform,the functional performance of the telemetry data storage was tested,and the test results showed that the data can be completely stored in the device,verifying the feasibility of the scheme,generally meeting the design requirements,with high application value.