Research And Design Of Low-dropout Regulator Based On 0.18μm BCD Process

With the widespread application of portable electronic products with battery as the power supply device,the battery life and volume are paid more attention by market users.In addition to the material and structure of the battery,the power management circuit is also a factor affecting the battery life and volume.The power management circuit can greatly improve the battery life of the power supply by reducing the energy losses and preventing the excessive discharge of the battery.As a linear modulation IC of power management chips,low-dropout regulator(LDO)plays an important role in power management field because of its advantages in noise,power consumption,response speed,easy integration and so on.In order to further improve the battery life of the battery supplied system,a low-power linear regulator with low-dropout is designed to meet the energy consumption requirements of portable products.In this paper,the main research contents of the low-power linear regulator with low-dropout are as follows:(1)For the requirements of low-power design,the reference circuit adopts the threshold voltage difference and thermal voltage compensation to obtain the reference voltage.By setting the MOS transistors operating in the sub-threshold region,the whole reference circuit can obtain very low quiescent current,good temperature coefficient,low output noise and high power supply rejection ratio.(2)In order to take into account the high gain of the error amplifier and the circuit parameters of the noise,speed,power consumption and so on,two-stage operational amplifier is designed,which consists of the sleeve cascode operational amplifier and common source amplifier.(3)In order to overcome the multi-pole stability problem caused by the three-stage operational amplifier consisting of two-stage operational amplifier and power stage,the Miller compensation is used to make the circuit stability better.Through the analysis of the open-loop transfer function of the multistage frequency compensation structure,it is proved that the system circuit have good stability.In this thesis,the effective input voltage range of LDO is 1.68～3V and the stable output voltage is 1.62 V based on the CSMC 0.18μm BCD process.The minimum quiescent current is 10.8μA,and the dropout voltage is 59.8m V.The linear regulation is 9.8m V/V,and the load regulation is 17 m V/A,showing good output accuracy.The phase margin of the system is60.19°.The power supply rejection ratio of the circuit is 67.63 d B at low frequencies below 1k Hz,which basically achieves the objective requirements.